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Message-ID: <9bcefe53-5ac8-5265-a0ac-83cdd69798eb@linaro.org>
Date:   Mon, 7 Nov 2022 12:33:32 +0100
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Subject: Re: [PATCH 2/2] dt-bindings: interrupt-controller: add yaml for
 LoongArch CPU interrupt controller
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To:     Liu Peibao <liupeibao@loongson.cn>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Huacai Chen <chenhuacai@kernel.org>,
        WANG Xuerui <kernel@xen0n.name>
Cc:     Jianmin Lv <lvjianmin@loongson.cn>,
        Yinbo Zhu <zhuyinbo@loongson.cn>, linux-mips@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20221107023404.26730-1-liupeibao@loongson.cn>
 <20221107023404.26730-2-liupeibao@loongson.cn>
 <b45b8cf8-de9d-7132-1a35-48deeb4b79d5@linaro.org>
 <196e80d8-f4fb-7393-81a5-bca757c805f5@loongson.cn>
 <e92beaac-aa88-0336-cb30-7de438de67c9@linaro.org>
 <e5910bf9-b662-a733-57f2-5faccb038cb1@loongson.cn>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <e5910bf9-b662-a733-57f2-5faccb038cb1@loongson.cn>
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On 07/11/2022 12:20, Liu Peibao wrote:
> On 11/7/22 5:55 PM, Krzysztof Kozlowski wrote:
>> On 07/11/2022 10:21, Liu Peibao wrote:
>>> On 11/7/22 4:28 PM, Krzysztof Kozlowski wrote:
>>>> On 07/11/2022 03:34, Liu Peibao wrote:
>>>>
>>>> Add commit msg explaining what you are doing here (e.g. the hardware).
>>>>
>>>
>>> I just add this yaml for what I did in patch 1/2 and the header seems enough
>>> to describe what I want to, so I did not add the commit log.
>>
>> This should instead describe briefly the hardware here.
>>
> 
> How about I add the following comments:
> 
> "Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
> the 14 IRQs are wired to the platforms internal interrupt controller cascade
> by devicetree."

Sure.

>>>>> +    const: loongarch,cpu-interrupt-controller
>>>>
>>>> You have exactly one and only one type of CPU interrupt controller for
>>>> all your Loongarch designs? All current and all future? All?
>>>>
>>>
>>> It is sure of that "all current and recent designs". It is really hard to limit the
>>> design in the distant future.
>>>
>>> And if there is updating, maybe I will add additional things like this:
>>> "loongarch,cpu-interrupt-controller-2.0".
>>
>> Unless you have a clear versioning of your hardware, adding 2.0 won't be
>> correct. Don't you have this for specific SoC?
>>
> 
> The "loongarch,cpu-interrupt-controller" now is compatible for all the LoongArch
> compatible CPUs, not specific for one chip. And we may keep this CPU interrupt
> controller for a long time.

Still specific compatibles (as fallbacks) are used for such cases, so
why is this different? Hardware compatible with several other devices
still gets specific compatible, right?

You cannot have "-2.0" suffix in the future just because "you want", so
be sure that your choice is reasonable.

Best regards,
Krzysztof