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Message-ID: <375f4f58-e071-c102-43d7-7fdff3970f72@arm.com>
Date:   Mon, 7 Nov 2022 19:06:39 +0530
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Subject: Re: [PATCH V2] arm64/mm: Simplify and document pte_to_phys() for 52
 bit addresses
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To:     Ard Biesheuvel <ardb@kernel.org>
Cc:     linux-arm-kernel@lists.infradead.org,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        linux-kernel@vger.kernel.org
References: <20221107114850.2902150-1-anshuman.khandual@arm.com>
 <CAMj1kXF2NyZS7cWiZiPBuySdFnpB_gcHa4KXieje4_G1-zCmog@mail.gmail.com>
From:   Anshuman Khandual <anshuman.khandual@arm.com>
In-Reply-To: <CAMj1kXF2NyZS7cWiZiPBuySdFnpB_gcHa4KXieje4_G1-zCmog@mail.gmail.com>
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On 11/7/22 17:32, Ard Biesheuvel wrote:
> Hello Anshuman,
> 
> On Mon, 7 Nov 2022 at 12:49, Anshuman Khandual
> <anshuman.khandual@arm.com> wrote:
>>
>> pte_to_phys() assembly definition does multiple bits field transformations
>> to derive physical address, embedded inside a page table entry. Unlike its
>> C counter part i.e __pte_to_phys(), pte_to_phys() is not very apparent. It
>> simplifies these operations via a new macro PTE_ADDR_HIGH_SHIFT indicating
>> how far the pte encoded higher address bits need to be left shifted. While
>> here, this also updates __pte_to_phys() and __phys_to_pte_val().
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Mark Brown <broonie@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: Ard Biesheuvel <ardb@kernel.org>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Suggested-by: Ard Biesheuvel <ardb@kernel.org>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> 
> With the nit below fixed, this looks good to me
> 
> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
> 
>> ---
>> This applies on v6.1-rc4
>>
>> Changes in V2:
>>
>> - Added PTE_ADDR_HIGH_SHIFT based method per Ard
>>
>> Changes in V1:
>>
>> https://lore.kernel.org/all/20221031082421.1957288-1-anshuman.khandual@arm.com/
>>
>>  arch/arm64/include/asm/assembler.h     | 8 +++-----
>>  arch/arm64/include/asm/pgtable-hwdef.h | 1 +
>>  arch/arm64/include/asm/pgtable.h       | 4 ++--
>>  3 files changed, 6 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
>> index e5957a53be39..6a39a3601cf7 100644
>> --- a/arch/arm64/include/asm/assembler.h
>> +++ b/arch/arm64/include/asm/assembler.h
>> @@ -660,12 +660,10 @@ alternative_endif
>>         .endm
>>
>>         .macro  pte_to_phys, phys, pte
>> -#ifdef CONFIG_ARM64_PA_BITS_52
>> -       ubfiz   \phys, \pte, #(48 - 16 - 12), #16
>> -       bfxil   \phys, \pte, #16, #32
>> -       lsl     \phys, \phys, #16
>> -#else
>>         and     \phys, \pte, #PTE_ADDR_MASK
>> +#ifdef CONFIG_ARM64_PA_BITS_52
>> +       orr \phys, \phys, \phys, lsl #PTE_ADDR_HIGH_SHIFT
>> +       and \phys, \phys, GENMASK_ULL(PHYS_MASK_SHIFT - 1, PAGE_SHIFT)
> 
> Please use tabs between the mnemonics and the arguments.

Sure, will do that.