Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>
To:     Chen Guokai <chenguokai17@mails.ucas.ac.cn>,
        paul.walmsley@sifive.com, palmer@dabbelt.com,
        aou@eecs.berkeley.edu, rostedt@goodmis.org, mingo@redhat.com,
        sfr@canb.auug.org.au
Cc:     linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        liaochang1@huawei.com, Chen Guokai <chenguokai17@mails.ucas.ac.cn>
Subject: Re: [PATCH v4 6/8] riscv/kprobe: Add code to check if kprobe can be
 optimized
In-Reply-To: <20221106100316.2803176-7-chenguokai17@mails.ucas.ac.cn>
References: <20221106100316.2803176-1-chenguokai17@mails.ucas.ac.cn>
 <20221106100316.2803176-7-chenguokai17@mails.ucas.ac.cn>
Date:   Mon, 07 Nov 2022 17:56:04 +0100
Message-ID: <87v8nq1z6j.fsf@all.your.base.are.belong.to.us>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

Chen Guokai <chenguokai17@mails.ucas.ac.cn> writes:

[...]

> diff --git a/arch/riscv/kernel/probes/opt.c b/arch/riscv/kernel/probes/op=
t.c
> index 6d23c843832e..876bec539554 100644
> --- a/arch/riscv/kernel/probes/opt.c
> +++ b/arch/riscv/kernel/probes/opt.c

[...]

>  /*
> - * If two free registers can be found at the beginning of both
> - * the start and the end of replaced code, it can be optimized
> - * Also, in-function jumps need to be checked to make sure that
> - * there is no jump to the second instruction to be replaced
> + * The kprobe can be optimized when no in-function jump reaches to the
> + * instructions replaced by optimized jump instructions(AUIPC/JALR).
>   */
>  static bool can_optimize(unsigned long paddr, struct optimized_kprobe *o=
p)
>  {
> -	return false;
> +	int ret;
> +	unsigned long addr, size =3D 0, offset =3D 0;
> +	struct kprobe *kp =3D get_kprobe((kprobe_opcode_t *)paddr);
> +
> +	/*
> +	 * Skip optimization if kprobe has been disarmed or instrumented
> +	 * instruction support XOI.
> +	 */
> +	if (!kp || (riscv_probe_decode_insn(&kp->opcode, NULL) !=3D INSN_GOOD))
> +		return false;
> +
> +	/*
> +	 * Find a instruction window large enough to contain a pair
> +	 * of AUIPC/JALR, and ensure each instruction in this window
> +	 * supports XOI.
> +	 */
> +	ret =3D search_copied_insn(paddr, op);
> +	if (ret)
> +		return false;
> +
> +	if (!kallsyms_lookup_size_offset(paddr, &size, &offset))
> +		return false;
> +
> +	/* Check there is enough space for relative jump(AUIPC/JALR) */
> +	if (size - offset <=3D op->optinsn.length)
> +		return false;
> +
> +	/*
> +	 * Decode instructions until function end, check any instruction
> +	 * don't jump into the window used to emit optprobe(AUIPC/JALR).
> +	 */

Don't the fixup tables need to be checked, similar to the x86 code?


Bj=C3=B6rn