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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bs15-20020a170906d1cf00b0078e54eda758si8711191ejb.611.2022.11.07.19.36.05; Mon, 07 Nov 2022 19:36:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=T43xvxWm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232796AbiKHDc3 (ORCPT + 91 others); Mon, 7 Nov 2022 22:32:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232505AbiKHDcX (ORCPT ); Mon, 7 Nov 2022 22:32:23 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B48062F381; Mon, 7 Nov 2022 19:32:16 -0800 (PST) X-UUID: 72f54b336c694eddbfbcbd6a5d43ae28-20221108 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=VBhN3LwXb2PUQNiVYOKslInRgnaAcvtagVU0NjZJVVM=; b=T43xvxWmyg1nqQkaESmHQKwCzdRbPJ7mFCTlfXJmYI6++MtFNp2i/u8JgiPhONTfEprXY6sJlbfv9LXZo3BYRHbqGPVOUNmDoIXKvsIMSARXIdspYmXEW7LFBIyRpegsUR7ZthKy+zwrs27CACZOlYjEPkB6rcEMYB9Q9rXIvnI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12,REQID:7e282171-c4b7-49de-816d-1537c2bd3fcd,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.12,REQID:7e282171-c4b7-49de-816d-1537c2bd3fcd,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:62cd327,CLOUDID:72aee490-1a78-4832-bd08-74b1519dcfbf,B ulkID:221108113214WZRGZAG0,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 72f54b336c694eddbfbcbd6a5d43ae28-20221108 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 97115433; Tue, 08 Nov 2022 11:32:13 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 8 Nov 2022 11:32:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 8 Nov 2022 11:32:12 +0800 From: Allen-KH Cheng To: Wim Van Sebroeck , Guenter Roeck , Krzysztof Kozlowski , Matthias Brugger , Rob Herring CC: , , , , , , , , Allen-KH Cheng Subject: [PATCH v5 2/7] arm64: dts: mediatek: mt8195: Fix watchdog compatible Date: Tue, 8 Nov 2022 11:32:04 +0800 Message-ID: <20221108033209.22751-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221108033209.22751-1-allen-kh.cheng@mediatek.com> References: <20221108033209.22751-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, T_SPF_TEMPERROR,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: AngeloGioacchino Del Regno MT8195's watchdog embeds a reset controller and needs only the mediatek,mt8195-wdt compatible string as the MT6589 one is there for watchdogs that don't have any reset controller capability. Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board") Signed-off-by: AngeloGioacchino Del Regno Co-developed-by: Allen-KH Cheng Signed-off-by: Allen-KH Cheng Reviewed-by: NĂ­colas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 905d1a90b406..0b254d245b47 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -683,8 +683,7 @@ }; watchdog: watchdog@10007000 { - compatible = "mediatek,mt8195-wdt", - "mediatek,mt6589-wdt"; + compatible = "mediatek,mt8195-wdt"; mediatek,disable-extrst; reg = <0 0x10007000 0 0x100>; #reset-cells = <1>; -- 2.18.0