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Date:   Mon, 7 Nov 2022 23:17:27 -0600
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From:   Samuel Holland <samuel@sholland.org>
To:     Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc:     Kishon Vijay Abraham I <kishon@ti.com>,
        Vinod Koul <vkoul@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Maxime Ripard <mripard@kernel.org>,
        Jagan Teki <jagan@amarulasolutions.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Maxime Ripard <maxime@cerno.tech>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-phy@lists.infradead.org, linux-sunxi@lists.linux.dev
References: <20220812075603.59375-1-samuel@sholland.org>
 <20220812075603.59375-2-samuel@sholland.org> <YvZGAEM4B8SdDjwJ@aptenodytes>
 <0c82fb9e-60cd-70d5-96d6-ee06c56eeb85@sholland.org>
Subject: Re: [PATCH 1/8] dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts
 property
In-Reply-To: <0c82fb9e-60cd-70d5-96d6-ee06c56eeb85@sholland.org>
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Hi Paul,

On 8/12/22 17:44, Samuel Holland wrote:
> On 8/12/22 7:22 AM, Paul Kocialkowski wrote:
>> On Fri 12 Aug 22, 02:55, Samuel Holland wrote:
>>> The sun6i DPHY can generate several interrupts, mostly for reporting
>>> error conditions, but also for detecting BTA and UPLS sequences.
>>> Document this capability in order to accurately describe the hardware.
>>>
>>> The DPHY has no interrupt number provided in the vendor documentation
>>> because its interrupt line is shared with the DSI controller.
>>
>> Interesting! I do see DPHY_INT_EN*/PD* in the Allwinner BSP's
>> drivers/media/video/sunxi-vfe/mipi_csi/dphy/dphy_reg_i.h
> 
> You can also find some bit of documentation in the T7 User Manual.
> 
>> Maybe it would be useful to import the fields in the driver so that the
>> next person who'll try to debug DSI can use them directly?
>>
>> You might also want to submit a patch as [PATCH NOT FOR MERGE] that
>> adds an interrupt routine and some useful debugging.
> 
> I think this would be more interesting to someone who knew more about MIPI
> CSI/DSI and understood what those errors meant. :)
> 
> I'm mostly concerned with bringing up the D1 SoC at the moment.

I added a trivial IRQ handler that dumps the status registers, just to
verify the interrupt number, and I got several interrupts during DSI
panel setup (so during DCS commands), mostly with DPHY_INT_PD0_REG =
0x03000000, signaling some sort of contention detection.

>> Do you think this is also available without a DSI controller?
>> I could just give it a try on V3/A83t here and find out :)
> 
> I would assume so. It could possibly be shared with the MIPI CSI interrupt (SPI
> 90) or keep its position at SPI 89.

Did you get a chance to try this? I am about to send v2 of this series.
I wonder if I should keep the interrupts property as required, since I
don't know if the interrupt is actually hooked up on SoCs with CSI only.

Regards,
Samuel

>>> Fixes: c25b84c00826 ("dt-bindings: display: Convert Allwinner DSI to a schema")
>>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>>> ---
>>>
>>>  .../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml           | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>>> index 22636c9fdab8..cf49bd99b3e2 100644
>>> --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>>> +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>>> @@ -24,6 +24,9 @@ properties:
>>>    reg:
>>>      maxItems: 1
>>>  
>>> +  interrupts:
>>> +    maxItems: 1
>>> +
>>>    clocks:
>>>      items:
>>>        - description: Bus Clock
>>> @@ -53,6 +56,7 @@ required:
>>>    - "#phy-cells"
>>>    - compatible
>>>    - reg
>>> +  - interrupts
>>>    - clocks
>>>    - clock-names
>>>    - resets
>>> -- 
>>> 2.35.1
>>>
>>
> 
>