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Message-ID: <cba37503-c8bc-b14f-39db-34dd0fa09c32@quicinc.com>
Date:   Tue, 8 Nov 2022 14:54:42 +0800
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Subject: Re: [PATCH] bus: mhi: host: Disable preemption while processing data
 events
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To:     Jeffrey Hugo <quic_jhugo@quicinc.com>, <mani@kernel.org>,
        <loic.poulain@linaro.org>
CC:     <mhi@lists.linux.dev>, <linux-arm-msm@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <quic_cang@quicinc.com>,
        <mrana@quicinc.com>
References: <1667462111-55496-1-git-send-email-quic_qianyu@quicinc.com>
 <25b67462-d6a6-c564-6830-694b726bd1d9@quicinc.com>
From:   Qiang Yu <quic_qianyu@quicinc.com>
In-Reply-To: <25b67462-d6a6-c564-6830-694b726bd1d9@quicinc.com>
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On 11/7/2022 11:00 PM, Jeffrey Hugo wrote:
> On 11/3/2022 1:55 AM, Qiang Yu wrote:
>> If data processing of an event is scheduled out because core
>> is busy handling multiple irqs, this can starves the processing
>> of MHI M0 state change event on another core. Fix this issue by
>> disabling irq on the core processing data events.
>
> Can you elaborate on the scenario more?
>
> If a device hasn't entered M0, then what event could be processed?
The scenario is following:
1. On Core 2 IPCR channel 20 transfer completion event MSI arrived which 
is processed by holding Event ring 1 lock by calling spin_lock_bh() in 
normal priority tasklet.
2. On Core 2 multiple irqs come in and scheduled out the event ring 
processing done by #1. Due to that event ring lock remained acquired but 
event ring processing for IPCR got scheduled out.
3. On Core 1, primary event ring MSI arrived for M0, which is handled by 
a separate MHI hi-priority tasklet. As part of M0 state transition,
tasklet goes over event ring 1 and tries to acquire event ring 1 lock in 
order to ring the event ring DB, but just gets stuck in busy wait due to 
#2.
At this point tasklet is at the mercy of the muiltiple irqs handle 
(which scheduled out the MHI tasklet of #1) to finish and let the MHI 
normal priority tasklet to run.