Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Tue, 8 Nov 2022 17:16:11 +0100 (CET)
From:   Anna-Maria Behnsen <anna-maria@linutronix.de>
To:     Frederic Weisbecker <frederic@kernel.org>
cc:     linux-kernel@vger.kernel.org,
        Peter Zijlstra <peterz@infradead.org>,
        John Stultz <jstultz@google.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Eric Dumazet <edumazet@google.com>,
        "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
        Arjan van de Ven <arjan@infradead.org>,
        "Paul E . McKenney" <paulmck@kernel.org>,
        Frederic Weisbecker <fweisbec@gmail.com>,
        Rik van Riel <riel@surriel.com>
Subject: Re: [PATCH v4 14/16] timer: Implement the hierarchical pull model
In-Reply-To: <20221107220727.GA10939@lothringen>
Message-ID: <c0afb1-2a23-f595-3e30-bb95c39e8e65@linutronix.de>
References: <20221104145737.71236-1-anna-maria@linutronix.de> <20221104145737.71236-15-anna-maria@linutronix.de> <20221107220727.GA10939@lothringen>
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Precedence: bulk

On Mon, 7 Nov 2022, Frederic Weisbecker wrote:

> On Fri, Nov 04, 2022 at 03:57:35PM +0100, Anna-Maria Behnsen wrote:
> > @@ -1859,6 +1863,36 @@ void forward_and_idle_timer_bases(unsigned long basej, u64 basem,
> >  	 */
> >  	is_idle = time_after(nextevt, basej + 1);
> >  
> > +	if (is_idle) {
> > +		u64 next_tmigr;
> > +
> > +		next_tmigr = tmigr_cpu_deactivate(tevt->global);
> > +
> > +		tevt->global = KTIME_MAX;
> > +
> > +		/*
> > +		 * If CPU is the last going idle in timer migration
> > +		 * hierarchy, make sure CPU will wake up in time to handle
> > +		 * remote timers. next_tmigr == KTIME_MAX if other CPUs are
> > +		 * still active.
> > +		 */
> > +		if (next_tmigr < tevt->local) {
> > +			u64 tmp;
> > +
> > +			/* If we missed a tick already, force 0 delta */
> > +			if (next_tmigr < basem)
> > +				next_tmigr = basem;
> > +
> > +			tmp = div_u64(next_tmigr - basem, TICK_NSEC);
> > +
> > +			nextevt = basej + (unsigned long)tmp;
> > +			tevt->local = next_tmigr;
> > +			is_idle = time_after(nextevt, basej + 1);
> > +		} else {
> > +			nextevt = nextevt_local;
> 
> That else part look unecessary.

Yes, you are right. I will add a comment instead. Maybe someone wants to
improve it and then requires the proper nextevt...

> > +		}
> > +	}
> > +
> >  	/* We need to mark both bases in sync */
> >  	base_local->is_idle = base_global->is_idle = is_idle;
> 
> Do we still need to maintain base_global->is_idle ?

is_idle information is required in trigger_dyntick_cpu(). I made a mistake
with the hunk in trigger_dyntick_cpu() introduced in this patch. Because
after this patch, global timers are still enqueued on any CPU because
crystallball still exists. trigger_dyntick_cpu() is also required for non
pinned timers. I need to move the hunk of trigger_dyntick_cpu() into the
last patch of the queue where crystallball is removed during enqueue and
there update also this line. Then I will drop the update of
base_global->is_idle in timer_clear_idle() as well.

Sorry. This went wrong during splitting and folding the queue back and
forwards...

> (I'm going to do daily reviews on this patch because it's quite dense :)

Thanks! I try to answer your questions fast. Let me know when you are done
or when you need an updated version for further review :)

Thanks,

	Anna-Maria