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Date:   Tue, 8 Nov 2022 09:17:26 -0800
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Subject: Re: [PATCH v12 04/17] riscv: Add vector feature to compile
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To:     Conor Dooley <conor.dooley@microchip.com>,
        Vineet Gupta <vineetg@rivosinc.com>
Cc:     =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>,
        Chris Stillson <stillson@rivosinc.com>,
        Greentime Hu <greentime.hu@sifive.com>,
        Guo Ren <guoren@linux.alibaba.com>,
        Vincent Chen <vincent.chen@sifive.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        Andy Chiu <andy.chiu@sifive.com>
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From:   Vineet Gupta <vineetg@rivosinc.com>
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On 11/7/22 23:56, Conor Dooley wrote:
> On Mon, Nov 07, 2022 at 04:04:28PM -0800, Vineet Gupta wrote:
>> +CC Andy, Conor
>>
>> On 11/7/22 09:21, Björn Töpel wrote:
>>>> +config VECTOR
>>>> +	bool "VECTOR support"
>>>> +	depends on GCC_VERSION >= 120000 || CLANG_VERSION >= 130000
>>>> +	default n
>>>> +	help
>>>> +	  Say N here if you want to disable all vector related procedure
>>>> +	  in the kernel.
>>>> +
>>>> +	  If you don't know what to do here, say Y.
>>>> +
>>>> +endmenu
>>> "VECTOR" is not really consistent to how the other configs are named;
>>> RISCV_ISA_V, RISCV_ISA_VECTOR, RISCV_VECTOR?
>>
>> Good point, I've changed it to RISCV_ISA_V to keep it consistent with
>> existing RISCV_ISA_C.
> 
> Hey Vineet, kinda randomly replying here but the wording makes it look
> like you're going to take this patchset on?
> If so, please check out v10 (think it was from April) as there are some
> comments on that version that IIRC remain un-resolved.

Sure thing. Although I only see a few from Christoph and kernel build bot.

-Vineet