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Message-ID: <9eb8f395-c77f-a0bf-96b7-f1a3bb178c48@intel.com>
Date:   Tue, 8 Nov 2022 10:27:56 -0800
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Subject: Re: [PATCH 1/3] x86/tsx: Add feature bit for TSX control MSR support
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To:     Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        Dave Hansen <dave.hansen@linux.intel.com>, x86@kernel.org,
        "H. Peter Anvin" <hpa@zytor.com>,
        "Rafael J. Wysocki" <rafael@kernel.org>,
        Pavel Machek <pavel@ucw.cz>,
        Andrew Cooper <Andrew.Cooper3@citrix.com>, degoede@redhat.com
Cc:     linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
        Daniel Sneddon <daniel.sneddon@linux.intel.com>,
        antonio.gomez.iglesias@linux.intel.com
References: <cover.1663025154.git.pawan.kumar.gupta@linux.intel.com>
 <8592af5e3b95b197231445beb8c3123948ced15a.1663025154.git.pawan.kumar.gupta@linux.intel.com>
From:   Dave Hansen <dave.hansen@intel.com>
In-Reply-To: <8592af5e3b95b197231445beb8c3123948ced15a.1663025154.git.pawan.kumar.gupta@linux.intel.com>
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On 9/12/22 16:39, Pawan Gupta wrote:
> Support for TSX control MSR is enumerated in MSR_IA32_ARCH_CAPABILITIES.
> This is different from how other CPU features are enumerated i.e. via
> CPUID. Enumerating support for TSX control currently has an overhead of
> reading the MSR every time which can be avoided.

I only see tsx_ctrl_is_supported() getting called in three places:

> 1 tsx.c tsx_clear_cpuid       138 } else if (tsx_ctrl_is_supported()) {
> 2 tsx.c tsx_dev_mode_disable  161 if (!boot_cpu_has_bug(X86_BUG_TAA) || !tsx_ctrl_is_supported() ||
> 3 tsx.c tsx_init              194 if (!tsx_ctrl_is_supported()) {

Those all look like boot-time things to me.  Why does the overhead matter?