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From:   Jim Mattson <jmattson@google.com>
Date:   Tue, 8 Nov 2022 14:59:11 -0800
Message-ID: <CALMp9eRcLPpt-OuXiNFUQwrkyDxRXErY7U_U3PZE0qN_ep7wdw@mail.gmail.com>
Subject: Re: [PATCH 3/3] x86/speculation: Support Automatic IBRS under virtualization
To:     Kim Phillips <kim.phillips@amd.com>
Cc:     x86@kernel.org, Borislav Petkov <bp@alien8.de>,
        Boris Ostrovsky <boris.ostrovsky@oracle.com>,
        Dave Hansen <dave.hansen@linux.intel.com>,
        "H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
        Joao Martins <joao.m.martins@oracle.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Sean Christopherson <seanjc@google.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        David Woodhouse <dwmw@amazon.co.uk>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Juergen Gross <jgross@suse.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Tony Luck <tony.luck@intel.com>,
        Babu Moger <Babu.Moger@amd.com>,
        Tom Lendacky <thomas.lendacky@amd.com>, kvm@vger.kernel.org,
        linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org
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On Tue, Nov 8, 2022 at 2:48 PM Kim Phillips <kim.phillips@amd.com> wrote:
>
> On 11/7/22 4:42 PM, Jim Mattson wrote:
> > On Mon, Nov 7, 2022 at 2:29 PM Kim Phillips <kim.phillips@amd.com> wrote:
> >>
> >> On 11/4/22 5:00 PM, Jim Mattson wrote:
> >>> On Fri, Nov 4, 2022 at 2:38 PM Kim Phillips <kim.phillips@amd.com> wrote:
> >>>>
> >>>> VM Guests may want to use Auto IBRS, so propagate the CPUID to them.
> >>>>
> >>>> Co-developed-by: Babu Moger <Babu.Moger@amd.com>
> >>>> Signed-off-by: Kim Phillips <kim.phillips@amd.com>
> >>>
> >>> The APM says that, under AutoIBRS, CPL0 processes "have IBRS
> >>> protection." I'm taking this to mean only that indirect branches in
> >>> CPL0 are not subject to steering from a less privileged predictor
> >>> mode. This would imply that indirect branches executed at CPL0 in L1
> >>> could potentially be subject to steering by code running at CPL0 in
> >>> L2, since L1 and L2 share hardware predictor modes.
> >>
> >> That's true for AMD processors that don't support Same Mode IBRS, also
> >> documented in the APM.
> >>
> >> Processors that support AutoIBRS also support Same Mode IBRS (see
> >> CPUID Fn8000_0008_EBX[IbrsSameMode] (bit 19)).
> >>
> >>> Fortunately, there is an IBPB when switching VMCBs in svm_vcpu_load().
> >>> But it might be worth noting that this is necessary for AutoIBRS to
> >>> work (unless it actually isn't).
> >>
> >> It is needed, but not for kernel/CPL0 code, rather to protect one
> >> guest's user-space code from another's.
> >
> > The question is whether it's necessary when switching between L1 and
> > L2 on the same vCPU of the same VM.
> >
> > On the Intel side, this was (erroneously) optimized away in commit
> > 5c911beff20a ("KVM: nVMX: Skip IBPB when switching between vmcs01 and
> > vmcs02").
>
> Then why hasn't it been reverted?

Sometimes, the wheels turn slowly. See
https://lore.kernel.org/kvm/20221019213620.1953281-1-jmattson@google.com/.

> Does its rationale not make sense?:
>
>      The IBPB is intended to prevent one guest from attacking another, which
>      is unnecessary in the nested case as it's the same guest from KVM's
>      perspective.

No, it doesn't. IBRS promises to protect the host from the guest. To
properly virtualize IBRS, KVM has to provide that protection,
regardless of its "perspective."