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Date:   Wed, 9 Nov 2022 00:10:32 +0100
From:   Borislav Petkov <bp@alien8.de>
To:     Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>,
        Dave Hansen <dave.hansen@linux.intel.com>, x86@kernel.org,
        "H. Peter Anvin" <hpa@zytor.com>,
        "Rafael J. Wysocki" <rafael@kernel.org>,
        Pavel Machek <pavel@ucw.cz>,
        Andrew Cooper <Andrew.Cooper3@citrix.com>, hdegoede@redhat.com,
        linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
        Daniel Sneddon <daniel.sneddon@linux.intel.com>,
        antonio.gomez.iglesias@linux.intel.com
Subject: Re: [PATCH 2/3] x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG
 enumeration
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On Tue, Nov 08, 2022 at 02:51:41PM -0800, Pawan Gupta wrote:
> Looking at bsp_init_amd() this feature bit will only be set on AMD
> families 0x15-0x17. Andrew mentioned that the MSR LS_CFG is present on
> AMD family >= 0x10 && family <= 0x18.

Do you need to save that MSR on those families?

Or do 0x15-0x18 suffice?

Yes, 0x18 because that's Hygon and that does its own detection.

So, do you need to save it on families 0x10-0x14?

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette