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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hg5-20020a1709072cc500b0078dc3cb8b41si14419250ejc.507.2022.11.08.18.22.08; Tue, 08 Nov 2022 18:22:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229936AbiKICOp (ORCPT + 93 others); Tue, 8 Nov 2022 21:14:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229868AbiKICOh (ORCPT ); Tue, 8 Nov 2022 21:14:37 -0500 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB76BE0EB; Tue, 8 Nov 2022 18:13:46 -0800 (PST) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Wed, 9 Nov 2022 09:58:33 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jianxin Pan , Kelvin Zhang , Jiucheng Xu Subject: [PATCH v9 4/4] arm64: dts: meson: Add DDR PMU node Date: Wed, 9 Nov 2022 09:58:18 +0800 Message-ID: <20221109015818.194927-4-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109015818.194927-1-jiucheng.xu@amlogic.com> References: <20221109015818.194927-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.88.11.200] X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DDR PMU device node for G12 series SoC Signed-off-by: Jiucheng Xu Reviewed-by: Neil Armstrong --- Changes v8 -> v9: - No change Changes v7 -> v8: - No change Changes v6 -> v7: - No change Changes v5 -> v6: - No change Changes v4 -> v5: - Split reg into two items - Alphabet order location Changes v3 -> v4: - No change Changes v2 -> v3: - No change Changes v1 -> v2: - Remove model, dmc_nr, chann_nr properties - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as identifier --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++ 4 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 45947c1031c4..9dbd50820b1c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1705,6 +1705,12 @@ internal_ephy: ethernet_phy@8 { }; }; + pmu: pmu@ff638000 { + reg = <0x0 0xff638000 0x0 0x100>, + <0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + aobus: bus@ff800000 { compatible = "simple-bus"; reg = <0x0 0xff800000 0x0 0x100000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index fb0ab27d1f64..0e8b57283f31 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -133,3 +133,7 @@ map1 { }; }; }; + +&pmu { + compatible = "amlogic,g12a-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index ee8fcae9f9f0..18791ef51f58 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -139,3 +139,7 @@ map1 { &mali { dma-coherent; }; + +&pmu { + compatible = "amlogic,g12b-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 80737731af3f..c307b34ccd72 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -520,6 +520,10 @@ &pcie { power-domains = <&pwrc PWRC_SM1_PCIE_ID>; }; +&pmu { + compatible = "amlogic,sm1-ddr-pmu"; +}; + &pwrc { compatible = "amlogic,meson-sm1-pwrc"; }; -- 2.25.1