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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dm5-20020a170907948500b0078e19e971b2si16383517ejc.915.2022.11.08.23.22.56; Tue, 08 Nov 2022 23:23:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229687AbiKIGmH (ORCPT + 93 others); Wed, 9 Nov 2022 01:42:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229669AbiKIGmG (ORCPT ); Wed, 9 Nov 2022 01:42:06 -0500 Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 38644192B5; Tue, 8 Nov 2022 22:42:04 -0800 (PST) Received: from loongson.cn (unknown [10.180.13.64]) by gateway (Coremail) with SMTP id _____8Bx3Ni6S2tjxHwFAA--.17534S3; Wed, 09 Nov 2022 14:42:02 +0800 (CST) Received: from [10.180.13.64] (unknown [10.180.13.64]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxmFe4S2tjt2QPAA--.24444S2; Wed, 09 Nov 2022 14:42:01 +0800 (CST) Subject: Re: [PATCH v8 1/2] pinctrl: pinctrl-loongson2: add pinctrl driver support To: Stephen Rothwell , Linus Walleij , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, zhanghongchen References: <20221109061122.786-1-zhuyinbo@loongson.cn> From: Yinbo Zhu Message-ID: Date: Wed, 9 Nov 2022 14:42:00 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20221109061122.786-1-zhuyinbo@loongson.cn> Content-Type: text/plain; charset=gbk; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8BxmFe4S2tjt2QPAA--.24444S2 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjvAXoW3uFWUWFW7AFy5GF18Xr1fJFb_yoW8XFyrXo WS9F1DZw4fAr18Jr98Xrn8GrW3ZF4xCr1DArZ7Zws8G3yavr17KrWDtr4xGFy8tr4rtr17 CasagFWrAF4Iqwn5n29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXasCq-sGcSsGvf J3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnRJU UUvY1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_JrI_Jryl8cAvFV AK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVWUCVW8JwA2 z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr 1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG 8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI 8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvEwIxGrwCYjI0SjxkI62AI1cAE67vIY487MxAIw28IcxkI7VAKI48JMxAIw28IcV Cjz48v1sIEY20_WwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18 MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr4 1lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1l IxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4 A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07j06wAUUUUU= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,NICE_REPLY_A, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus Walleij, I had added some changes in these series patch in v8, please help add my change and merge it into your tree and sync it to linux-next. Thanks, Yinbo. ?? 2022/11/9 ????2:11, Yinbo Zhu ะด??: > The Loongson-2 SoC has a few pins that can be used as GPIOs or take > multiple other functions. Add a driver for the pinmuxing. > > There is currently no support for GPIO pin pull-up and pull-down. > > Signed-off-by: zhanghongchen > Signed-off-by: Yinbo Zhu > --- > Change in v8: > 1. Add #include . > 2. Add #include . > Change in v7: > 1. Add all history change log information. > Change in v6: > 1. Add #include . > Change in v5: > 1. NO change, but other patch in this series of patches set has > change. > Change in v4: > 1. Replace Loongson2/loongson2 with Loongson-2/loongson-2/LOONGSON-2 > but except c file. > 2. Add a helper combining two calls and that helper is > "devm_platform_ioremap_resource". > Change in v3: > 1. NO change, but other patch in this series of patches set has > change. > Change in v2: > 1. Add "depends LOONGARCH || COMPILE_TEST" in Kconfig. > 2. Fixup the odd indentation in Kconfig. > 3. Make coma goes to previous line. in Kconfig. > 4. Add items in alphabetical order in Makefile. > 5. Add const type for loongson2_pmx_functions. > 6. Add static for loongson2_pmx_ops. > 7. Replace sizeof(struct loongson2_pinctrl) with sizeof(*pctrl). > 8. Use dev_err_probe as helper to replace "dev_err" and > "return PTR_ERR()". > 9. Replace raw spinlock with ordinary spinlock. > > MAINTAINERS | 7 + > drivers/pinctrl/Kconfig | 11 + > drivers/pinctrl/Makefile | 1 + > drivers/pinctrl/pinctrl-loongson2.c | 331 ++++++++++++++++++++++++++++ > 4 files changed, 350 insertions(+) > create mode 100644 drivers/pinctrl/pinctrl-loongson2.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index 6234b5c57a9a..7c71cf2a6ddd 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -12036,6 +12036,13 @@ S: Maintained > F: Documentation/devicetree/bindings/timer/loongson,ls2k-hpet.yaml > F: drivers/clocksource/loongson2_hpet.c > > +LOONGSON-2 SOC SERIES PINCTRL DRIVER > +M: zhanghongchen > +M: Yinbo Zhu > +L: linux-gpio@vger.kernel.org > +S: Maintained > +F: drivers/pinctrl/pinctrl-loongson2.c > + > LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI) > M: Sathya Prakash > M: Sreekanth Reddy > diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig > index f71fefff400f..a053952e2482 100644 > --- a/drivers/pinctrl/Kconfig > +++ b/drivers/pinctrl/Kconfig > @@ -512,6 +512,17 @@ config PINCTRL_ZYNQMP > This driver can also be built as a module. If so, the module > will be called pinctrl-zynqmp. > > +config PINCTRL_LOONGSON2 > + tristate "Pinctrl driver for the Loongson-2 SoC" > + depends on LOONGARCH || COMPILE_TEST > + select PINMUX > + select GENERIC_PINCONF > + help > + This selects pin control driver for the Loongson-2 SoC. It > + provides pin config functions multiplexing. GPIO pin pull-up, > + pull-down functions are not supported. Say yes to enable > + pinctrl for Loongson-2 SoC. > + > source "drivers/pinctrl/actions/Kconfig" > source "drivers/pinctrl/aspeed/Kconfig" > source "drivers/pinctrl/bcm/Kconfig" > diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile > index 89bfa01b5231..37b1f9bb85e5 100644 > --- a/drivers/pinctrl/Makefile > +++ b/drivers/pinctrl/Makefile > @@ -29,6 +29,7 @@ obj-$(CONFIG_PINCTRL_KEEMBAY) += pinctrl-keembay.o > obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o > obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o > obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o > +obj-$(CONFIG_PINCTRL_LOONGSON2) += pinctrl-loongson2.o > obj-$(CONFIG_PINCTRL_LPC18XX) += pinctrl-lpc18xx.o > obj-$(CONFIG_PINCTRL_MAX77620) += pinctrl-max77620.o > obj-$(CONFIG_PINCTRL_MCP23S08_I2C) += pinctrl-mcp23s08_i2c.o > diff --git a/drivers/pinctrl/pinctrl-loongson2.c b/drivers/pinctrl/pinctrl-loongson2.c > new file mode 100644 > index 000000000000..8d2813cb60cf > --- /dev/null > +++ b/drivers/pinctrl/pinctrl-loongson2.c > @@ -0,0 +1,331 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Author: zhanghongchen > + * Yinbo Zhu > + * Copyright (C) 2022-2023 Loongson Technology Corporation Limited > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "core.h" > +#include "pinctrl-utils.h" > + > +#define PMX_GROUP(grp, offset, bitv) \ > + { \ > + .name = #grp, \ > + .pins = grp ## _pins, \ > + .num_pins = ARRAY_SIZE(grp ## _pins), \ > + .reg = offset, \ > + .bit = bitv, \ > + } > + > +#define SPECIFIC_GROUP(group) \ > + static const char * const group##_groups[] = { \ > + #group \ > + } > + > +#define FUNCTION(fn) \ > + { \ > + .name = #fn, \ > + .groups = fn ## _groups, \ > + .num_groups = ARRAY_SIZE(fn ## _groups), \ > + } > + > +struct loongson2_pinctrl { > + struct device *dev; > + struct pinctrl_dev *pcdev; > + struct pinctrl_desc desc; > + struct device_node *of_node; > + spinlock_t lock; > + void * __iomem reg_base; > +}; > + > +struct loongson2_pmx_group { > + const char *name; > + const unsigned int *pins; > + unsigned int num_pins; > + unsigned int reg; > + unsigned int bit; > +}; > + > +struct loongson2_pmx_func { > + const char *name; > + const char * const *groups; > + unsigned int num_groups; > +}; > + > +#define LOONGSON2_PIN(x) PINCTRL_PIN(x, "gpio"#x) > +static const struct pinctrl_pin_desc loongson2_pctrl_pins[] = { > + LOONGSON2_PIN(0), LOONGSON2_PIN(1), LOONGSON2_PIN(2), LOONGSON2_PIN(3), > + LOONGSON2_PIN(4), LOONGSON2_PIN(5), LOONGSON2_PIN(6), LOONGSON2_PIN(7), > + LOONGSON2_PIN(8), LOONGSON2_PIN(9), LOONGSON2_PIN(10), LOONGSON2_PIN(11), > + LOONGSON2_PIN(12), LOONGSON2_PIN(13), LOONGSON2_PIN(14), > + LOONGSON2_PIN(16), LOONGSON2_PIN(17), LOONGSON2_PIN(18), LOONGSON2_PIN(19), > + LOONGSON2_PIN(20), LOONGSON2_PIN(21), LOONGSON2_PIN(22), LOONGSON2_PIN(23), > + LOONGSON2_PIN(24), LOONGSON2_PIN(25), LOONGSON2_PIN(26), LOONGSON2_PIN(27), > + LOONGSON2_PIN(28), LOONGSON2_PIN(29), LOONGSON2_PIN(30), > + LOONGSON2_PIN(32), LOONGSON2_PIN(33), LOONGSON2_PIN(34), LOONGSON2_PIN(35), > + LOONGSON2_PIN(36), LOONGSON2_PIN(37), LOONGSON2_PIN(38), LOONGSON2_PIN(39), > + LOONGSON2_PIN(40), LOONGSON2_PIN(41), > + LOONGSON2_PIN(44), LOONGSON2_PIN(45), LOONGSON2_PIN(46), LOONGSON2_PIN(47), > + LOONGSON2_PIN(48), LOONGSON2_PIN(49), LOONGSON2_PIN(50), LOONGSON2_PIN(51), > + LOONGSON2_PIN(52), LOONGSON2_PIN(53), LOONGSON2_PIN(54), LOONGSON2_PIN(55), > + LOONGSON2_PIN(56), LOONGSON2_PIN(57), LOONGSON2_PIN(58), LOONGSON2_PIN(59), > + LOONGSON2_PIN(60), LOONGSON2_PIN(61), LOONGSON2_PIN(62), LOONGSON2_PIN(63), > +}; > + > +static const unsigned int gpio_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, > + 8, 9, 10, 11, 12, 13, 14, > + 16, 17, 18, 19, 20, 21, 22, 23, > + 24, 25, 26, 27, 28, 29, 30, > + 32, 33, 34, 35, 36, 37, 38, 39, > + 40, 43, 44, 45, 46, 47, > + 48, 49, 50, 51, 52, 53, 46, 55, > + 56, 57, 58, 59, 60, 61, 62, 63}; > +static const unsigned int sdio_pins[] = {36, 37, 38, 39, 40, 41}; > +static const unsigned int can1_pins[] = {34, 35}; > +static const unsigned int can0_pins[] = {32, 33}; > +static const unsigned int pwm3_pins[] = {23}; > +static const unsigned int pwm2_pins[] = {22}; > +static const unsigned int pwm1_pins[] = {21}; > +static const unsigned int pwm0_pins[] = {20}; > +static const unsigned int i2c1_pins[] = {18, 19}; > +static const unsigned int i2c0_pins[] = {16, 17}; > +static const unsigned int nand_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, > + 52, 53, 54, 55, 56, 57, 58, 59, 60, > + 61, 62, 63}; > +static const unsigned int sata_led_pins[] = {14}; > +static const unsigned int lio_pins[] = {}; > +static const unsigned int i2s_pins[] = {24, 25, 26, 27, 28}; > +static const unsigned int hda_pins[] = {24, 25, 26, 27, 28, 29, 30}; > +static const unsigned int uart2_pins[] = {}; > +static const unsigned int uart1_pins[] = {}; > +static const unsigned int camera_pins[] = {}; > +static const unsigned int dvo1_pins[] = {}; > +static const unsigned int dvo0_pins[] = {}; > + > +static struct loongson2_pmx_group loongson2_pmx_groups[] = { > + PMX_GROUP(gpio, 0x0, 64), > + PMX_GROUP(sdio, 0x0, 20), > + PMX_GROUP(can1, 0x0, 17), > + PMX_GROUP(can0, 0x0, 16), > + PMX_GROUP(pwm3, 0x0, 15), > + PMX_GROUP(pwm2, 0x0, 14), > + PMX_GROUP(pwm1, 0x0, 13), > + PMX_GROUP(pwm0, 0x0, 12), > + PMX_GROUP(i2c1, 0x0, 11), > + PMX_GROUP(i2c0, 0x0, 10), > + PMX_GROUP(nand, 0x0, 9), > + PMX_GROUP(sata_led, 0x0, 8), > + PMX_GROUP(lio, 0x0, 7), > + PMX_GROUP(i2s, 0x0, 6), > + PMX_GROUP(hda, 0x0, 4), > + PMX_GROUP(uart2, 0x8, 13), > + PMX_GROUP(uart1, 0x8, 12), > + PMX_GROUP(camera, 0x10, 5), > + PMX_GROUP(dvo1, 0x10, 4), > + PMX_GROUP(dvo0, 0x10, 1), > + > +}; > + > +SPECIFIC_GROUP(sdio); > +SPECIFIC_GROUP(can1); > +SPECIFIC_GROUP(can0); > +SPECIFIC_GROUP(pwm3); > +SPECIFIC_GROUP(pwm2); > +SPECIFIC_GROUP(pwm1); > +SPECIFIC_GROUP(pwm0); > +SPECIFIC_GROUP(i2c1); > +SPECIFIC_GROUP(i2c0); > +SPECIFIC_GROUP(nand); > +SPECIFIC_GROUP(sata_led); > +SPECIFIC_GROUP(lio); > +SPECIFIC_GROUP(i2s); > +SPECIFIC_GROUP(hda); > +SPECIFIC_GROUP(uart2); > +SPECIFIC_GROUP(uart1); > +SPECIFIC_GROUP(camera); > +SPECIFIC_GROUP(dvo1); > +SPECIFIC_GROUP(dvo0); > + > +static const char * const gpio_groups[] = { > + "sdio", "can1", "can0", "pwm3", "pwm2", "pwm1", "pwm0", "i2c1", > + "i2c0", "nand", "sata_led", "lio", "i2s", "hda", "uart2", "uart1", > + "camera", "dvo1", "dvo0" > +}; > + > +static const struct loongson2_pmx_func loongson2_pmx_functions[] = { > + FUNCTION(gpio), > + FUNCTION(sdio), > + FUNCTION(can1), > + FUNCTION(can0), > + FUNCTION(pwm3), > + FUNCTION(pwm2), > + FUNCTION(pwm1), > + FUNCTION(pwm0), > + FUNCTION(i2c1), > + FUNCTION(i2c0), > + FUNCTION(nand), > + FUNCTION(sata_led), > + FUNCTION(lio), > + FUNCTION(i2s), > + FUNCTION(hda), > + FUNCTION(uart2), > + FUNCTION(uart1), > + FUNCTION(camera), > + FUNCTION(dvo1), > + FUNCTION(dvo0), > +}; > + > +static int loongson2_get_groups_count(struct pinctrl_dev *pcdev) > +{ > + return ARRAY_SIZE(loongson2_pmx_groups); > +} > + > +static const char *loongson2_get_group_name(struct pinctrl_dev *pcdev, > + unsigned int selector) > +{ > + return loongson2_pmx_groups[selector].name; > +} > + > +static int loongson2_get_group_pins(struct pinctrl_dev *pcdev, unsigned int selector, > + const unsigned int **pins, unsigned int *num_pins) > +{ > + *pins = loongson2_pmx_groups[selector].pins; > + *num_pins = loongson2_pmx_groups[selector].num_pins; > + > + return 0; > +} > + > +static void loongson2_pin_dbg_show(struct pinctrl_dev *pcdev, struct seq_file *s, > + unsigned int offset) > +{ > + seq_printf(s, " %s", dev_name(pcdev->dev)); > +} > + > +static const struct pinctrl_ops loongson2_pctrl_ops = { > + .get_groups_count = loongson2_get_groups_count, > + .get_group_name = loongson2_get_group_name, > + .get_group_pins = loongson2_get_group_pins, > + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, > + .dt_free_map = pinctrl_utils_free_map, > + .pin_dbg_show = loongson2_pin_dbg_show, > +}; > + > +static int loongson2_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned int func_num, > + unsigned int group_num) > +{ > + struct loongson2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pcdev); > + unsigned long reg = (unsigned long)pctrl->reg_base + > + loongson2_pmx_groups[group_num].reg; > + unsigned int mux_bit = loongson2_pmx_groups[group_num].bit; > + unsigned int val; > + unsigned long flags; > + > + spin_lock_irqsave(&pctrl->lock, flags); > + val = readl((void *)reg); > + if (func_num == 0) > + val &= ~(1< + else > + val |= (1< + writel(val, (void *)reg); > + spin_unlock_irqrestore(&pctrl->lock, flags); > + > + return 0; > +} > + > +static int loongson2_pmx_get_funcs_count(struct pinctrl_dev *pcdev) > +{ > + return ARRAY_SIZE(loongson2_pmx_functions); > +} > + > +static const char *loongson2_pmx_get_func_name(struct pinctrl_dev *pcdev, > + unsigned int selector) > +{ > + return loongson2_pmx_functions[selector].name; > +} > + > +static int loongson2_pmx_get_groups(struct pinctrl_dev *pcdev, > + unsigned int selector, > + const char * const **groups, > + unsigned int * const num_groups) > +{ > + *groups = loongson2_pmx_functions[selector].groups; > + *num_groups = loongson2_pmx_functions[selector].num_groups; > + > + return 0; > +} > + > +static const struct pinmux_ops loongson2_pmx_ops = { > + .set_mux = loongson2_pmx_set_mux, > + .get_functions_count = loongson2_pmx_get_funcs_count, > + .get_function_name = loongson2_pmx_get_func_name, > + .get_function_groups = loongson2_pmx_get_groups, > +}; > + > +static int loongson2_pinctrl_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct loongson2_pinctrl *pctrl; > + > + pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); > + if (!pctrl) > + return -ENOMEM; > + > + pctrl->reg_base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(pctrl->reg_base)) > + return dev_err_probe(pctrl->dev, PTR_ERR(pctrl->reg_base), > + "unable to map I/O memory"); > + > + spin_lock_init(&pctrl->lock); > + > + pctrl->dev = dev; > + pctrl->desc.name = "pinctrl-loongson2"; > + pctrl->desc.owner = THIS_MODULE; > + pctrl->desc.pctlops = &loongson2_pctrl_ops; > + pctrl->desc.pmxops = &loongson2_pmx_ops; > + pctrl->desc.confops = NULL; > + pctrl->desc.pins = loongson2_pctrl_pins; > + pctrl->desc.npins = ARRAY_SIZE(loongson2_pctrl_pins); > + > + pctrl->pcdev = devm_pinctrl_register(pctrl->dev, &pctrl->desc, pctrl); > + if (IS_ERR(pctrl->pcdev)) > + return dev_err_probe(pctrl->dev, PTR_ERR(pctrl->pcdev), > + "can't register pinctrl device"); > + > + return 0; > +} > + > +static const struct of_device_id loongson2_pinctrl_dt_match[] = { > + { > + .compatible = "loongson,ls2k-pinctrl", > + }, > + { }, > +}; > + > +static struct platform_driver loongson2_pinctrl_driver = { > + .probe = loongson2_pinctrl_probe, > + .driver = { > + .name = "loongson2-pinctrl", > + .of_match_table = loongson2_pinctrl_dt_match, > + }, > +}; > + > +static int __init loongson2_pinctrl_init(void) > +{ > + return platform_driver_register(&loongson2_pinctrl_driver); > +} > +arch_initcall(loongson2_pinctrl_init); > + > +static void __exit loongson2_pinctrl_exit(void) > +{ > + platform_driver_unregister(&loongson2_pinctrl_driver); > +} > +module_exit(loongson2_pinctrl_exit); >