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Wed, 09 Nov 2022 18:35:11 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 01ED210002A; Wed, 9 Nov 2022 18:35:08 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id F0E30229A7D; Wed, 9 Nov 2022 18:35:07 +0100 (CET) Received: from [10.252.15.206] (10.252.15.206) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.32; Wed, 9 Nov 2022 18:35:06 +0100 Message-ID: <6df7b823-463b-d6fa-9662-54f39463a894@foss.st.com> Date: Wed, 9 Nov 2022 18:35:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH 3/3] nvmem: stm32: add OP-TEE support for STM32MP13x Content-Language: en-US To: Srinivas Kandagatla , Alexandre TORGUE , Maxime Coquelin CC: Etienne CARRIERE , , , , Fabrice Gasnier References: <20221028145252.2115933-1-patrick.delaunay@foss.st.com> <20221028165150.3.Ibc43aa73f865090affeb1751af0cc260c7f1dd07@changeid> <99a8d093-13f3-9ff8-6d87-d4aecaec1566@linaro.org> <4789703d-0434-2e72-0001-5a7e1014f816@linaro.org> From: Patrick DELAUNAY In-Reply-To: <4789703d-0434-2e72-0001-5a7e1014f816@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.252.15.206] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-09_06,2022-11-09_01,2022-06-22_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 11/8/22 11:03, Srinivas Kandagatla wrote: > > > On 02/11/2022 10:59, Patrick DELAUNAY wrote: >> Hi, >> >> On 11/1/22 08:26, Srinivas Kandagatla wrote: >>> >>> >>> On 28/10/2022 15:52, Patrick Delaunay wrote: >>>> For boot with OP-TEE on STM32MP13, the communication with the secure >>>> world no more use STMicroelectronics SMC but communication with the >>>> BSEC TA, for data access (read/write) or lock operation: >>>> - all the request are sent to OP-TEE trusted application, >>>> - for upper OTP with ECC protection and with word programming only >>>>    each OTP are permanently locked when programmed to avoid ECC error >>>>    on the second write operation >>>> >>>> Signed-off-by: Patrick Delaunay >>>> --- >>> >>> For some reason I pushed this patch without a full review, This is >>> now reverted from nvmem-next. >> >> >> Ok >> >> >>> >>> Why not add TEE client based new driver instead of ifdefing around >>> this driver? Also I see there is not much common across both drivers >>> anyway. >> >> >> I hesitate between the 2 solutions. I choose this update to handle >> the STM32MP15 support with OP-TEE. > > How are you to handing this? > >> >> For backward compatibility reason the same driver STM32 ROMEM >> associated to compatible "st,stm32mp15-bsec" should be kept. >> >> - the lower OTP can directly accessible by Linux (the IP is not >> secured) => boot with SPL > > Can we determine this at runtime? Not directly with IP register, but we detect the OP-TEE support at runtime. > >> >> - the upper OTP and the write operation are requested by >> STMicroelectronics SMCs >> >>     => boot with TF-A SPMIN and old OP-TEE (before migration to STM32 >> BSEC PTA) >> >> >> But in the future OP-TEE the access to OTP should be also done with >> STM32 BSEC PTA... > > Given that we have only one compatible for these two type of > combinations how are you planning to deal with both the cases and > still be backward compatible? yes, as it is the SOC dtsi, I don't want change the IP compatible but I will handle in this driver probe to be backward compatible: detection of OP-TEE presence and SMC/PTA support. only the STM32MP13 SoC only use the PTA, as we have no backward compatibility issue. I will include this STM32MP15 patch in the serie for V2, it should be mode clear for the review. > > --srini >> >> >> I can manage this compatibility by detection in STM32 romem driver if >> the booth access are managed in the same driver. > > > >> >> This patch can be added in the serie to understood the detection >> mechanism. >> Regards Patrick