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Date:   Thu, 10 Nov 2022 00:00:29 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Jan Petrous <jan.petrous@nxp.com>
Cc:     Chester Lin <clin@suse.com>,
        Andreas =?iso-8859-1?Q?F=E4rber?= <afaerber@suse.de>,
        Rob Herring <robh@kernel.org>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        dl-S32 <S32@nxp.com>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        Matthias Brugger <mbrugger@suse.com>
Subject: Re: [EXT] Re: [PATCH 2/5] dt-bindings: net: add schema for NXP S32CC
 dwmac glue driver
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> > Here I just focus on GMAC since there are other LAN interfaces that S32
> > family
> > uses [e.g. PFE]. According to the public GMACSUBSYS ref manual rev2[1]
> > provided
> > on NXP website, theoretically GMAC can run SGMII in 1000Mbps and
> > 2500Mbps so I
> > assume that supporting 1000BASE-X could be achievable. I'm not sure if any
> > S32
> > board variant might have SFP ports but RJ-45 [1000BASE-T] should be the
> > major
> > type used on S32G-EVB and S32G-RDB2.
> > 
> > @NXP, please feel free to correct me if anything wrong.
> > 
> 
> NXP eval boards (EVB or RDB) have also 2.5G PHYs, so together with SerDes
> driver we support 100M/1G/2.5G on such copper PHYs. 

Hi Jan

Does the SERDES clock need to change when going between 1000BaseX and
2500BaseX?

If so, it sounds like Linux not having control of that clock is going
to limit what can be supported.

   Andrew