Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp1388512rwb; Wed, 9 Nov 2022 17:29:32 -0800 (PST) X-Google-Smtp-Source: AMsMyM7YX4lqDvU6JeopQPbJ4ehQ7mxaySDMCJTjqTuk/ZU1oxKqxWppSb3AdYuIt5IhGLRhfsc4 X-Received: by 2002:a17:906:11d3:b0:782:2d3e:6340 with SMTP id o19-20020a17090611d300b007822d3e6340mr2074052eja.234.1668043772121; Wed, 09 Nov 2022 17:29:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668043772; cv=none; d=google.com; s=arc-20160816; b=M7G/HOjLUoaNLUrbLvZw53SU4ARRfvWIOH9yFCr5VlE1+uq1sFJ6oFwXxi3GQjOEO7 KFmjBN9eAfXkFK0RG4+ty5kOlU9ZymJdix2cUGhJA7X47iOJ/4oIgLFVljrYo0I7z6N7 BsVSXRvWTqJHrGenVMRcG+Ldglv5oUeFxiPplmSRrHkwwvGtZfA6avMtq7hEE3yMG9Ks gZeOHULNlSLE1u0wEOPWggNR5iJJmc7vDLuVoqprNf3Tp3Tvq3m39Cahd+/CfMoVdq9A aJxVUSw/fmomCrfbf35DxmGK7x0DUh6xCJU52ZYC9T7CHOgi0tK+8Oddze/ivvF4z99g oRww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=Ebjudc0xk5NVXJxUYmSH20jr0/rLogM7OLpL8FGFnok=; b=Ws0P0WWisuM7vxwmHLq8w9QCBc2p2BchQlwuRN1jYGzgE2DonLePIov6QnSEvNYY4E Cgva0bOi1zzqJh6Xeg83CZgpE3EIB/uFyZyZXakpnMyRd1sL+eTqq7SrJmEsx3J4NydP NNnTPLyYn2YWgDVQUJCiJYFlqPMMOkd7zJfXXsC46fQLukj2sQUGd3vX5SoF3bpUQTlI yZ4fMafYnIJ+wdj9J6OIqB8E1HBwA3PL1aBiMjbdf+1ALArDnlgK4/5WjdoGgZrghi6P ZByCIio83pQ5IbdDyEMsbr9fB6qnxpgx2ce3Qrxgmg8l86pYrg6IZ0aZ6eJJ8Em9xrxp LaGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@jms.id.au header.s=google header.b=TdvYTT8t; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hc19-20020a170907169300b007824b741e7asi19938180ejc.236.2022.11.09.17.29.09; Wed, 09 Nov 2022 17:29:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@jms.id.au header.s=google header.b=TdvYTT8t; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232145AbiKJBJW (ORCPT + 92 others); Wed, 9 Nov 2022 20:09:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232114AbiKJBJL (ORCPT ); Wed, 9 Nov 2022 20:09:11 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56C8C20BFD; Wed, 9 Nov 2022 17:09:08 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id r203-20020a1c44d4000000b003cfa97c05cdso661247wma.4; Wed, 09 Nov 2022 17:09:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=Ebjudc0xk5NVXJxUYmSH20jr0/rLogM7OLpL8FGFnok=; b=TdvYTT8ti5iSInXJNnadweZQKvALgiKhWYvKe5miRwBgFzGToG3kRZNeY0RX7B/vLz aqn1i908HzNiV8EAebHxaIps2YxXwdcz6iZviXESJWaQ7ajVIZ1sk2z2tEpx+lfH8HLw sdkVm8q1MPqwr3xCHcMsfy56HEXtGLmBw0Q/s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Ebjudc0xk5NVXJxUYmSH20jr0/rLogM7OLpL8FGFnok=; b=idabos/XC8zNpJFBumsVTclqYCTUfOTH5N8+8ziOBfeftaVdo8nxh/dYhFENqmLtDf kIlrCQcgK/KysL5fPOskSChcTGCusB/8jf8Av4NOlYJVYf8CzA7wKIo04RkYCbJ1EcB/ YK5NILjFJRO3GFXxc9pVaFVB8gWsYCF75uv//Supmy4b20ZGcSvASb5QqzZuSwVyvKo/ UKT8aGQStUzzyh2FZwdRljBZodktlnHPexOxQ+a5FXDTQm0MWRL1ZB8pccoUElO6bFEI /dUm09wWL68unwYVb1VTuNIGBN4Oqyht8lQqyOCMm0++8ks6kzfSpvsITyVZ5QyEqrnN mZSw== X-Gm-Message-State: ACrzQf0bLkTQbJIxiL+SluLlFBCZt9rbdOAANZgC4oI7rN0FSY5wXKN6 E8nlodzHEshdh/AntTgE/15xdy2joAomypi5g7U= X-Received: by 2002:a05:600c:a46:b0:3b9:9b97:9304 with SMTP id c6-20020a05600c0a4600b003b99b979304mr41636762wmq.34.1668042546700; Wed, 09 Nov 2022 17:09:06 -0800 (PST) MIME-Version: 1.0 References: <20221107171500.2537938-1-gsomlo@gmail.com> <20221107171500.2537938-4-gsomlo@gmail.com> In-Reply-To: <20221107171500.2537938-4-gsomlo@gmail.com> From: Joel Stanley Date: Thu, 10 Nov 2022 01:08:55 +0000 Message-ID: Subject: Re: [PATCH v1 3/3] serial: liteuart: add IRQ support To: Gabriel Somlo Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, kgugala@antmicro.com, mholenko@antmicro.com, david.abdurachmanov@sifive.com, florent@enjoy-digital.fr Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 7 Nov 2022 at 17:15, Gabriel Somlo wrote: > > Add support for IRQ-driven RX. The TX path remains "polling" based, > which is fine since TX is synchronous. > > Signed-off-by: Gabriel Somlo > --- > drivers/tty/serial/liteuart.c | 65 +++++++++++++++++++++++++++++++---- > 1 file changed, 58 insertions(+), 7 deletions(-) > > diff --git a/drivers/tty/serial/liteuart.c b/drivers/tty/serial/liteuart.c > index 90a29ed79bff..47ce3ecc50f2 100644 > --- a/drivers/tty/serial/liteuart.c > +++ b/drivers/tty/serial/liteuart.c > @@ -6,6 +6,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -90,13 +91,27 @@ static void liteuart_rx_chars(struct uart_port *port) > tty_flip_buffer_push(&port->state->port); > } > > +static irqreturn_t liteuart_interrupt(int irq, void *data) > +{ > + struct uart_port *port = data; > + unsigned int isr; > + > + isr = litex_read32(port->membase + OFF_EV_PENDING); > + > + spin_lock(&port->lock); > + if (isr & EV_RX) > + liteuart_rx_chars(port); > + spin_unlock(&port->lock); > + > + return IRQ_RETVAL(isr); I don't follow this. If you've handled the RX IRQ, you want to return IRQ_HANDLED. And if it's a different bit set you haven't handled it. > +} > + > static void liteuart_timer(struct timer_list *t) > { > struct liteuart_port *uart = from_timer(uart, t, timer); > struct uart_port *port = &uart->port; > > - liteuart_rx_chars(port); > - > + liteuart_interrupt(0, port); > mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); > } > > @@ -165,19 +180,48 @@ static void liteuart_stop_rx(struct uart_port *port) > static int liteuart_startup(struct uart_port *port) > { > struct liteuart_port *uart = to_liteuart_port(port); > + unsigned long flags; > + int ret; > + u8 irq_mask = 0; > > - /* disable events */ > - litex_write8(port->membase + OFF_EV_ENABLE, 0); > + if (port->irq) { > + ret = request_irq(port->irq, liteuart_interrupt, 0, > + DRV_NAME, port); > + if (ret == 0) { > + /* we only need interrupts on the rx path! */ Why not use the tx interrupts too? > + irq_mask = EV_RX; > + } else { > + pr_err(DRV_NAME ": can't attach LiteUART %d irq=%d; " > + "switching to polling\n", port->line, port->irq); put the string on the one line so it's grepable. Take a look a the help for pr_fmt in include/linux/printk.h. This way you get the driver name prefix for all pr_ messages. > + port->irq = 0; > + } > + } > > - /* prepare timer for polling */ > - timer_setup(&uart->timer, liteuart_timer, 0); > - mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); > + if (!port->irq) { > + timer_setup(&uart->timer, liteuart_timer, 0); > + mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); > + } > + > + spin_lock_irqsave(&port->lock, flags); Are you sure we need to take a lock and disable interrupts here? > + litex_write8(port->membase + OFF_EV_ENABLE, irq_mask); > + spin_unlock_irqrestore(&port->lock, flags); > > return 0; > } > > static void liteuart_shutdown(struct uart_port *port) > { > + struct liteuart_port *uart = to_liteuart_port(port); > + unsigned long flags; > + > + spin_lock_irqsave(&port->lock, flags); same as above. I think the reason for doing this might have been if you had a set of registers to change inside the critical section that you needed to appear atomic. But this hardware only has one register to flip, so we can do without the locking. > + litex_write8(port->membase + OFF_EV_ENABLE, 0); > + spin_unlock_irqrestore(&port->lock, flags); > + > + if (port->irq) > + free_irq(port->irq, port); > + else > + del_timer_sync(&uart->timer); > } > > static void liteuart_set_termios(struct uart_port *port, struct ktermios *new, > @@ -266,6 +310,13 @@ static int liteuart_probe(struct platform_device *pdev) > goto err_erase_id; > } > > + /* get irq */ > + ret = platform_get_irq_optional(pdev, 0); > + if (ret < 0 && ret != -ENXIO) > + return ret; > + if (ret > 0) > + port->irq = ret; > + > /* values not from device tree */ > port->dev = &pdev->dev; > port->iotype = UPIO_MEM; > -- > 2.37.3 >