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Fri, 11 Nov 2022 08:58:46 -0800 (PST) Received: from localhost ([135.180.227.92]) by smtp.gmail.com with ESMTPSA id 21-20020a170902c21500b00178143a728esm1916305pll.275.2022.11.11.08.58.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 08:58:46 -0800 (PST) Date: Fri, 11 Nov 2022 08:58:46 -0800 (PST) X-Google-Original-Date: Fri, 11 Nov 2022 08:48:38 PST (-0800) Subject: [GIT PULL] RISC-V Fixes for 6.1-rc5 CC: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org From: Palmer Dabbelt To: Linus Torvalds Message-ID: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following changes since commit d14e99bf95510fa2d6affc371ad68161afc1dc8e: RISC-V: Fix /proc/cpuinfo cpumask warning (2022-10-27 15:23:19 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.1-rc5 for you to fetch changes up to fcae44fd36d052e956e69a64642fc03820968d78: RISC-V: vdso: Do not add missing symbols to version section in linker script (2022-11-10 15:06:14 -0800) ---------------------------------------------------------------- RISC-V Fixes for 6.1-rc5 * A fix to add the missing PWM LEDs into the SiFive HiFive Unleashed device tree. * A fix to fully clear a task's registers on creation, as they end up in userspace and thus leak kernel memory. * A pair of VDSO-related build fixes that manifest on recent LLVM-based toolchains. * A fix to our early init to ensure the DT is adequately processed before reserved memory nodes are processed. ---------------------------------------------------------------- I did get one soft lockup earlier this week, but it doesn't seem to reliably reproduce and happens without these patches. ---------------------------------------------------------------- Conor Dooley (1): riscv: fix reserved memory setup Emil Renner Berthing (1): riscv: dts: sifive unleashed: Add PWM controlled LEDs Jisheng Zhang (2): riscv: process: fix kernel info leakage riscv: vdso: fix build with llvm Nathan Chancellor (1): RISC-V: vdso: Do not add missing symbols to version section in linker script .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 38 ++++++++++++++++++++++ arch/riscv/kernel/process.c | 2 ++ arch/riscv/kernel/setup.c | 1 + arch/riscv/kernel/vdso/Makefile | 5 ++- arch/riscv/kernel/vdso/vdso.lds.S | 2 ++ arch/riscv/mm/init.c | 1 - 6 files changed, 47 insertions(+), 2 deletions(-)