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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 21-20020a631355000000b0046fabcda4easi2823248pgt.555.2022.11.11.10.08.17; Fri, 11 Nov 2022 10:08:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Sy2alGhP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233716AbiKKRkD (ORCPT + 91 others); Fri, 11 Nov 2022 12:40:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231625AbiKKRkC (ORCPT ); Fri, 11 Nov 2022 12:40:02 -0500 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB82411442 for ; Fri, 11 Nov 2022 09:40:01 -0800 (PST) Received: by mail-pl1-x635.google.com with SMTP id j12so4757343plj.5 for ; Fri, 11 Nov 2022 09:40:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=9VmHrF7f47E4VNBhDF2e+NO6WB+riPDrXDo4vmyhQh4=; b=Sy2alGhPAY4dRLL8NhVi5LMeqzPl4YZGksRyhbH6KFcOnxsoRCWeQDYO9bSUMuFp3F HtMmuBHeWFqlGu9qWwLwHuzOlKzIeL6hJykKUO8Gdnq8ekXg9CV1XZEHZ8EIeVq5xO+V 4XGRgIVAgGbUlYpIm1V9GwDwg5hI7bfMRZ/v5SeknQu6Qm1B6z1tj0vYE2w8+4rUW66m Zdqvfvy0qWjrG1dPYkIq3SZNiHMn2EXE+hGWJn1r6Wcc+JZ83GyQ7UQmRVWAjEyugQOL Q70URkjCQsikEcdg6rDp8v2G6yl5D1h49qSS6fhtp+ga8VG0VKPQ6Bg9FSnJMhbxdOJd a3AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=9VmHrF7f47E4VNBhDF2e+NO6WB+riPDrXDo4vmyhQh4=; b=N9ABbM24XxEHlgCitSBqUMQXxdGPVo9jbXB67d4MoMEdQC4CpmFn0D+9c+OZrJyTAi EE6HiMT0C7b5BabALpT6q2ebi1REEvG5q8m9vQPqDywbw5lSHd5hkivUFa3QIoF4tB1e Ud1RdlzDIF5/tpROEJTIzvCw9gcykr5nD//pTuKd3Yjt3ncYrXrJCVow0DMQjaKr79lD Xe4eNUXy3CnK1TcMxiA63Q6a4igbGjKx2xs1MrPLmKlrfPq56UssWrQS1VUnHHCAy76/ Ys5B9YPSH6gKbDJ4hTLS4vYCUgBRQkg8jjfgZE/sWUUNh+rlgeVuNXA9lrf+KC1QhOkm ++zg== X-Gm-Message-State: ANoB5pk5sI+Pv06MGjzJQHuxCwIPeSeuOOt8WRzGSq9lTyA9+HaJkcrk gdwdaYp9PRQMUj3RsgL3rHwp X-Received: by 2002:a17:90b:3d83:b0:200:7cf7:3d79 with SMTP id pq3-20020a17090b3d8300b002007cf73d79mr2872179pjb.206.1668188401136; Fri, 11 Nov 2022 09:40:01 -0800 (PST) Received: from thinkpad ([117.202.188.198]) by smtp.gmail.com with ESMTPSA id r17-20020a170903411100b00186c3727294sm1947481pld.270.2022.11.11.09.39.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 09:39:58 -0800 (PST) Date: Fri, 11 Nov 2022 23:09:52 +0530 From: Manivannan Sadhasivam To: Catalin Marinas Cc: Amit Pundir , Robin Murphy , Bjorn Andersson , Sibi Sankar , Will Deacon , Linus Torvalds , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov Subject: Re: [GIT PULL] arm64 updates for 6.1-rc1 Message-ID: <20221111173952.GB5393@thinkpad> References: <20221005144116.2256580-1-catalin.marinas@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 11, 2022 at 11:15:11AM +0000, Catalin Marinas wrote: > On Tue, Nov 08, 2022 at 10:58:16PM +0530, Amit Pundir wrote: > > On Tue, 25 Oct 2022 at 18:08, Amit Pundir wrote: > > > On Wed, 12 Oct 2022 at 17:24, Catalin Marinas wrote: > > > > On Sat, Oct 08, 2022 at 08:28:26PM +0530, Amit Pundir wrote: > > > > > On Wed, 5 Oct 2022 at 20:11, Catalin Marinas wrote: > > > > > > Will Deacon (2): > > > > > > arm64: dma: Drop cache invalidation from arch_dma_prep_coherent() > > > > > > > > > > This patch broke AOSP on Dragonboard 845c (SDM845). I don't see any > > > > > relevant crash in the attached log and device silently reboots into > > > > > USB crash dump mode. The crash is fairly reproducible on db845c. I > > > > > could trigger it twice in 5 reboots and it always crash at the same > > > > > point during the boot process. Reverting this patch fixes the crash. > > > > > > > > > > I'm happy to test run any debug patche(s), that would help narrow > > > > > down this breakage. > [...] > > > Further narrowed down the breakage to the userspace daemon rmtfs > > > https://github.com/andersson/rmtfs. Is there anything specific in the > > > userspace code that I should be paying attention to? > > Since you don't see anything in the logs like a crash and the system > restarts, I suspect it's some deadlock and that's triggering the > watchdog. We have an erratum (826319) but that's for Cortex-A53. IIUC > SDM845 has Kryo 3xx series which based on some random google searches is > derived from A75/A55. Unfortunately the MIDR_EL1 register doesn't match > the Arm Ltd numbering, so I have no idea what CPUs these are by looking > at the boot log. > > I wouldn't be surprised if you hit a similar bug, though I couldn't find > anything close in the A55 errata notice. > > While we could revert commit c44094eee32f ("arm64: dma: Drop cache > invalidation from arch_dma_prep_coherent()"), if you hit a real hardware > issue it may trigger in other scenario where we only do cache cleaning > (without invalidate), like arch_sync_dma_for_device(). So I'd rather get > to the bottom of this and potentially enable the workaround for this > chipset. > > You could give it a quick try to by adding the MIDR ranges for SDM845 to > struct midr_range workaround_clean_cache[]. > I gave it a shot and indeed it fixes the crash on DB845. > After that I suggest you raise it with Qualcomm to investigate. Normally > we ask for an erratum number to enable a workaround and it's only > Qualcomm that can provide one here. > I will check with Qualcomm folks and update. Thanks, Mani > -- > Catalin -- மணிவண்ணன் சதாசிவம்