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Date:   Fri, 11 Nov 2022 12:08:49 -0600
From:   Bjorn Andersson <andersson@kernel.org>
To:     Sibi Sankar <quic_sibis@quicinc.com>
Cc:     Bjorn Andersson <quic_bjorande@quicinc.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Georgi Djakov <djakov@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Mike Tipton <quic_mdtipton@quicinc.com>,
        Johan Hovold <johan+linaro@kernel.org>,
        linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 05/10] dt-bindings: interconnect: Add sm8350, sc8280xp
 and generic OSM L3 compatibles
Message-ID: <20221111180849.hegnho4qeaewuzwz@builder.lan>
References: <20221111032515.3460-1-quic_bjorande@quicinc.com>
 <20221111032515.3460-6-quic_bjorande@quicinc.com>
 <d738cdd8-1963-78d4-2c6f-6597b3b02d0f@quicinc.com>
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On Fri, Nov 11, 2022 at 04:02:42PM +0530, Sibi Sankar wrote:
> 
> 
> On 11/11/22 08:55, Bjorn Andersson wrote:
> > Add EPSS L3 compatibles for sm8350 and sc8280xp, but while at it also
> > introduce generic compatible for both qcom,osm-l3 and qcom,epss-l3.
> > 
> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> > Tested-by: Steev Klimaszewski <steev@kali.org>
> > ---
> > 
> > Changes since v1:
> > - Fixed oneOf to be valid schema
> > - Fixed example to follow schema
> > 
> >   .../bindings/interconnect/qcom,osm-l3.yaml    | 24 ++++++++++++-------
> >   1 file changed, 16 insertions(+), 8 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> > index bf538c0c5a81..aadae4424ba9 100644
> > --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> > +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> > @@ -16,13 +16,21 @@ description:
> >   properties:
> >     compatible:
> > -    enum:
> > -      - qcom,sc7180-osm-l3
> > -      - qcom,sc7280-epss-l3
> > -      - qcom,sc8180x-osm-l3
> > -      - qcom,sdm845-osm-l3
> > -      - qcom,sm8150-osm-l3
> > -      - qcom,sm8250-epss-l3
> > +    oneOf:
> > +      - items:
> > +          - enum:
> > +              - qcom,sc7180-osm-l3
> > +              - qcom,sc8180x-osm-l3
> > +              - qcom,sdm845-osm-l3
> > +              - qcom,sm8150-osm-l3
> > +          - const: qcom,osm-l3
> > +      - items:
> > +          - enum:
> > +              - qcom,sc7280-epss-l3
> > +              - qcom,sc8280xp-epss-l3
> > +              - qcom,sm8250-epss-l3
> > +              - qcom,sm8350-epss-l3
> > +          - const: qcom,epss-l3
> 
> isn't it incorrect to describe qcom,epss-l3 as a working
> backup compatible for sc7280-epss-l3 and sm8250-epss-l3?
> Shouldn't we just add another items list with those 2 as
> enums?
> 

I was about to agree, but the difference between the two sets are which
registers we use to request the speed.

And per our recent discussion, I was under the impression that this
would be a property of BIT(0) in 0xb0 being set, not which platform
we're running on.

If that's the case then they are indeed compatible and we should adjust
.ref_perf_state based on per-core DCVS being set or not.


So I do think this description is appropriate...

Regards,
Bjorn

> >     reg:
> >       maxItems: 1
> > @@ -56,7 +64,7 @@ examples:
> >       #define RPMH_CXO_CLK        0
> >       osm_l3: interconnect@17d41000 {
> > -      compatible = "qcom,sdm845-osm-l3";
> > +      compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3";
> >         reg = <0x17d41000 0x1400>;
> >         clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;