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From:   <Conor.Dooley@microchip.com>
To:     <bigeasy@linutronix.de>, <jszhang@kernel.org>
CC:     <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
        <aou@eecs.berkeley.edu>, <anup@brainfault.org>,
        <atishp@atishpatra.org>, <tglx@linutronix.de>,
        <rostedt@goodmis.org>, <linux-riscv@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
        <kvm-riscv@lists.infradead.org>
Subject: Re: [PATCH v2 0/5] riscv: add PREEMPT_RT support
Thread-Topic: [PATCH v2 0/5] riscv: add PREEMPT_RT support
Thread-Index: AQHYvWTJWdidtLbFYESs6cM+7jS71q3KyLAAgAFXEYCAAAVoAIBuFNKAgAAAhACAAgl5gA==
Date:   Sat, 12 Nov 2022 21:40:28 +0000
Message-ID: <151be14c-3a2c-2721-a7dc-3f2be25bafb5@microchip.com>
References: <20220831175920.2806-1-jszhang@kernel.org>
 <4488b1ec-aa34-4be5-3b9b-c65f052f5270@microchip.com>
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