Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp5305106rwb; Mon, 14 Nov 2022 02:31:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf7GqU31/GoNvJXzXWWObnTQZZ89MsWHPUNzvh/c+ULzKNJhoZMVkWgpJBq+N9EBuAeLPJRL X-Received: by 2002:a17:902:6b0b:b0:187:3fc8:986e with SMTP id o11-20020a1709026b0b00b001873fc8986emr12749031plk.4.1668421903352; Mon, 14 Nov 2022 02:31:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668421903; cv=none; d=google.com; s=arc-20160816; b=L/PZZYtTlaTPx6TDyJSBg198LYDLkuOLB+qe3TiRKpuRS5YcV3ZMQNMw3a4GHqULGF 5oxRgsxt5Lc9B8wMBU0sd7nyV4WV12RcT0S6lwYJ7BKV4jATpCxjov3jg+TMqY1FJFsw 3iGehB2uNiKarwE8npno9qdzh5nxyjph8JyTyX7KUKGQvQU/8g1IIaocgPF2Vc2fkM/G Pvxpky7RgzdB1df3QHRWmeN52K3v6sDMxKkH/mbyrH0x4t0qLQK7IQpihXZmH+xCVA6J qgaUrT5kG/9kg/VYUydnOCvd/b9fEWpiaKgC+f7raGUEm4ltHXgEXFl8xDjqAjOKND5m fQNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=bWpDJZx8s8TqHa3dJij9Er/yWcw9t9Zuq4Q2LMKSWTc=; b=ARg2SJ8YfqRDVyVzfYKKRE0GxvnIMTwjnxVEofvBZhaGj4aPQU9C5ZJrm5d9mESEKt /SLIUstY2WUy9shH69OjB4Ry2H91g3wSB/7HOH4lEFPxSsHZx+jNtEfkeoOZR5obyTVc GiJ323uVzj1c3Xpr9qSKfb5ts5BNKLQrwIYc+m52AOvDopC7KnA+SJLHFXcV+MmX50rz 5Tmci/ddcNNG5qi0qwPZIZKvBvGPZyxNfgmG0fsuny5HJsclpHUVylaPZFVwh56vdLxF 2Xj8U1fVzNv3DpDxqBctwn/cPlH4l0zqlJvYbwBO/BdYA88WgQBKU3nNh75v9o90Jj+Y IBcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cjIVuxX4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u9-20020a056a00158900b00556c1c66b61si10329787pfk.143.2022.11.14.02.31.32; Mon, 14 Nov 2022 02:31:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cjIVuxX4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236363AbiKNKPa (ORCPT + 88 others); Mon, 14 Nov 2022 05:15:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236162AbiKNKOm (ORCPT ); Mon, 14 Nov 2022 05:14:42 -0500 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 633C41D0E1 for ; Mon, 14 Nov 2022 02:13:49 -0800 (PST) Received: by mail-ed1-x534.google.com with SMTP id u24so16484298edd.13 for ; Mon, 14 Nov 2022 02:13:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=bWpDJZx8s8TqHa3dJij9Er/yWcw9t9Zuq4Q2LMKSWTc=; b=cjIVuxX4EEpXLMXV2WzT6KB3lCTMfAzo5a/4HH4bnaQj8WYSdU2b4hOg/1XuhEFqTm MIVJcOjRmnpDTodd9l48wPFyNzSjQk58K0mfSytAiALhZ3F+2BZSxvDVJzQkbaE+EP5z o/pd2iHNzokxzR4uDeZa7hytJoY8Kw7SkFftbAQIeyHk6G+zS/sdZ7fw0sA2bYXhhhc7 5812tgdjdoHIx+pn1Xk8Ehd7iPIwmzXzELEnCVoAgqHVyJsIyrdXf8NngIuamDquzjNQ U76qfYjMshYPaUzDSFNsNU20vSf1Rj0i/wEPpmqDg2cIZdOzVQZlwV4DnUNfd2azOCtN ffEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=bWpDJZx8s8TqHa3dJij9Er/yWcw9t9Zuq4Q2LMKSWTc=; b=CeHgx+3GC5vfkJ91iz654kZZCddAZrRKeXwg/BfHCxoubI8Wlj+hzRD1g5N8wNWICa Y95+IY3cLAPhSxr55JyX5x8cRx7PTCwkFwdtDMi1SfmQ9PvsUBAn99hejhHtpWy5f7t9 vBCnZaW8pCZxfV81TROzt77qiVL1xRaKKCpPVbNcgeuEeRUx1dLhY9xbso/sIgc85Yjt wjyniR/FQn27g5Svj2U8chxj9xy54UkUFyg2jbQlaDEHo4Yw3tK8F5ZlDne/E6/RN18f c4trqotVZwMtAi/78aPatVf8N12GqKk0MjKZilN68Fo2jIzfxeK0dU7Iw3chUlT773v5 uxIw== X-Gm-Message-State: ANoB5pn0ZcCz7KdwQZM6ZYDl4+ssHo9ZWbhReBHvS9kQV95j0pTIASsT IBxCi7YwkORDHvwKFkYJiNNWmp+Vk1g8wTeBvdTiFoTmths= X-Received: by 2002:a50:ee13:0:b0:463:a83c:e0af with SMTP id g19-20020a50ee13000000b00463a83ce0afmr10150851eds.158.1668420827920; Mon, 14 Nov 2022 02:13:47 -0800 (PST) MIME-Version: 1.0 References: <20221108092840.14945-1-JJLIU0@nuvoton.com> <20221108092840.14945-4-JJLIU0@nuvoton.com> In-Reply-To: From: Linus Walleij Date: Mon, 14 Nov 2022 11:13:36 +0100 Message-ID: Subject: Re: [PATCH v2 3/3] dt-bindings: gpio: Add Nuvoton NPCM750 serial I/O expansion interface(SGPIO) To: Jim Liu Cc: JJLIU0@nuvoton.com, KWLIU@nuvoton.com, brgl@bgdev.pl, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, openbmc@lists.ozlabs.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 14, 2022 at 9:38 AM Jim Liu wrote: > Our sgpio module has 64 pins output and 64 pins input. > Soc have 8 reg to control 64 output pins > and 8 reg to control 64 input pins. > so the pin is only for gpi or gpo. > > The common property ngpio can be out or in. > so i need to create d_out and d_in to control it. > customers can set the number of output or input pins to use. > the driver will open the ports to use. > ex: if i set d_out=9 and d_in=20 > driver will open two output ports and three input ports. > > Another method is the driver default opens all ports , in this > situation the driver doesn't need d_out and d_in. Finally I get it! Some of the above should go into the binding document so that others understand it too. Have you considered splitting this into 2 instances with 2 DT nodes: one with up to 64 output-only pins and one with up to 64 input-only pins? That means more nodes in the DT and more compatibles. If all the registers are in the same place maybe this is not a good idea. If you feel you need to keep the two properties, create something custom for your hardware because this is not generally useful, e.g. nuvoton,input-ngpios = <...> nuvoton,output-ngpios = <...> By this nomenclature it also becomes more evident what is going on. Yours, Linus Walleij