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Message-ID: <4ed43222-17b0-8355-f836-adabb453e432@csgroup.eu>
Date:   Mon, 14 Nov 2022 14:17:17 +0100
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Subject: Re: [PATCH] powerpc/xmon: Fix array_size.cocci warning
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To:     wangkailong@jari.cn, mpe@ellerman.id.au, npiggin@gmail.com,
        Julia.Lawall@inria.fr, joel@jms.id.au
Cc:     linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
References: <6432107b.12b.1847043884e.Coremail.wangkailong@jari.cn>
From:   Christophe Leroy <christophe.leroy@csgroup.eu>
In-Reply-To: <6432107b.12b.1847043884e.Coremail.wangkailong@jari.cn>
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Le 13/11/2022 à 10:13, wangkailong@jari.cn a écrit :
> Fix the following coccicheck warning:
> 
> arch/powerpc/xmon/ppc-opc.c:957:67-68: WARNING: Use ARRAY_SIZE
> arch/powerpc/xmon/ppc-opc.c:7280:24-25: WARNING: Use ARRAY_SIZE
> arch/powerpc/xmon/ppc-opc.c:6972:25-26: WARNING: Use ARRAY_SIZE
> arch/powerpc/xmon/ppc-opc.c:7211:21-22: WARNING: Use ARRAY_SIZE
> 
> Signed-off-by: KaiLong Wang <wangkailong@jari.cn>

This code is copied from Binutils.

This change has been rejected several times already.

See 
https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20181004171036.GA1907@embeddedor.com/#2006148

Christophe


> ---
>   arch/powerpc/xmon/ppc-opc.c | 13 ++++---------
>   1 file changed, 4 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c
> index 0774d711453e..ad64c2709757 100644
> --- a/arch/powerpc/xmon/ppc-opc.c
> +++ b/arch/powerpc/xmon/ppc-opc.c
> @@ -954,9 +954,7 @@ const struct powerpc_operand powerpc_operands[] =
>     { 0xff, 11, NULL, NULL, PPC_OPERAND_SIGNOPT },
>   };
>   
> -const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
> -					   / sizeof (powerpc_operands[0]));
> -
> +const unsigned int num_powerpc_operands = ARRAY_SIZE(powerpc_operands);
>   /* The functions used to insert and extract complicated operands.  */
>   
>   /* The ARX, ARY, RX and RY operands are alternate encodings of GPRs.  */
> @@ -6968,8 +6966,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
>   {"fcfidu.",	XRC(63,974,1),	XRA_MASK, POWER7|PPCA2,	PPCVLE,		{FRT, FRB}},
>   };
>   
> -const int powerpc_num_opcodes =
> -  sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]);
> +const int powerpc_num_opcodes = ARRAY_SIZE(powerpc_opcodes);
>   
>   /* The VLE opcode table.
>   
> @@ -7207,8 +7204,7 @@ const struct powerpc_opcode vle_opcodes[] = {
>   {"se_bl",	BD8(58,0,1),	BD8_MASK,	PPCVLE,	0,		{B8}},
>   };
>   
> -const int vle_num_opcodes =
> -  sizeof (vle_opcodes) / sizeof (vle_opcodes[0]);
> +const int vle_num_opcodes = ARRAY_SIZE(vle_opcodes);
>   
>   /* The macro table.  This is only used by the assembler.  */
>   
> @@ -7276,5 +7272,4 @@ const struct powerpc_macro powerpc_macros[] = {
>   {"e_clrlslwi",4, PPCVLE, "e_rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"},
>   };
>   
> -const int powerpc_num_macros =
> -  sizeof (powerpc_macros) / sizeof (powerpc_macros[0]);
> +const int powerpc_num_macros = ARRAY_SIZE(powerpc_macros);