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[209.85.128.181]) by smtp.gmail.com with ESMTPSA id r17-20020ae9d611000000b006ee7e223bb8sm6967561qkk.39.2022.11.14.11.03.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 14 Nov 2022 11:03:55 -0800 (PST) Received: by mail-yw1-f181.google.com with SMTP id 00721157ae682-376596ae449so115854177b3.5; Mon, 14 Nov 2022 11:03:55 -0800 (PST) X-Received: by 2002:a81:4dc3:0:b0:370:61f5:b19e with SMTP id a186-20020a814dc3000000b0037061f5b19emr13890254ywb.316.1668452635372; Mon, 14 Nov 2022 11:03:55 -0800 (PST) MIME-Version: 1.0 References: <20221114180843.1125308-1-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Mon, 14 Nov 2022 20:03:43 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks To: Biju Das Cc: Prabhakar , Geert Uytterhoeven , Wim Van Sebroeck , Guenter Roeck , Philipp Zabel , "linux-watchdog@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , Fabrizio Castro , Prabhakar Mahadev Lad Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.6 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Biju, On Mon, Nov 14, 2022 at 7:42 PM Biju Das wrote: > > -----Original Message----- > > From: Prabhakar > > Sent: 14 November 2022 18:09 > > To: Geert Uytterhoeven ; Wim Van Sebroeck > > ; Guenter Roeck ; Philipp Zabel > > ; linux-watchdog@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org; > > Prabhakar ; Biju Das > > ; Fabrizio Castro > > ; Prabhakar Mahadev Lad > lad.rj@bp.renesas.com> > > Subject: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put the PM > > clocks > > > > From: Lad Prabhakar > > > > On RZ/Five SoC it was observed that setting timeout (to say 1 sec) wouldn't > > reset the system. To fix this we make sure we issue a reset before putting > > the PM clocks to make sure the registers have been cleared. > > > > While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as we were > > calling the same functions here. > > > > Signed-off-by: Lad Prabhakar > > --- > > Note, > > - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five. > > - My initial investigation showed adding the delay after > > pm_runtime_get_sync() > > also fixed this issue. > > - Do I need add the fixes tag ? what should be the operation PUT- > > >RESET/RESET->PUT? > > It looks like timing issue, None of the previous devices are affected by this. To me it looks like the device must be clocked for the reset signal to be propagated? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds