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Message-ID: <9cda597c-1d31-4b8b-99ba-deab58975976@rivosinc.com>
Date:   Tue, 15 Nov 2022 09:38:53 -0800
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Subject: Re: [PATCH v12 04/17] riscv: Add vector feature to compile
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To:     Conor.Dooley@microchip.com, bjorn@kernel.org, stillson@rivosinc.com
Cc:     greentime.hu@sifive.com, guoren@linux.alibaba.com,
        vincent.chen@sifive.com, paul.walmsley@sifive.com,
        palmer@dabbelt.com, aou@eecs.berkeley.edu, guoren@kernel.org,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20220921214439.1491510-1-stillson@rivosinc.com>
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 <98343aa8-b04d-fe58-8af8-4eeca03106d1@microchip.com>
From:   Vineet Gupta <vineetg@rivosinc.com>
In-Reply-To: <98343aa8-b04d-fe58-8af8-4eeca03106d1@microchip.com>
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On 11/13/22 08:16, Conor.Dooley@microchip.com wrote:
>>> +config VECTOR
>>> +     bool "VECTOR support"
>>> +     depends on GCC_VERSION >= 120000 || CLANG_VERSION >= 130000
>>> +     default n
>>> +     help
>>> +       Say N here if you want to disable all vector related procedure
>>> +       in the kernel.
>>> +
>>> +       If you don't know what to do here, say Y.
>>> +
>>> +endmenu
>> "VECTOR" is not really consistent to how the other configs are named;
>> RISCV_ISA_V, RISCV_ISA_VECTOR, RISCV_VECTOR?
> It'd be RISCV_ISA_V to match the others single letter extentions, right?

Yep.

> The toolchain dependency check here also seems rather naive.

Indeed. I can build the code just fine with gcc-11 (and gcc-12), 
although my reworked patcheset doesn't include all the orig patches 
including the in-kernel xor stuff.

-Vineet