Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp882677rwb; Wed, 16 Nov 2022 08:54:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf5mje0KrQrfVdk7qEtjMHgHFkEmhXT4VCyZzXfuh84oDLMBTHc+bptXhHPqZEf15GQfVW1B X-Received: by 2002:a63:dc42:0:b0:43c:3b6d:d6ab with SMTP id f2-20020a63dc42000000b0043c3b6dd6abmr22110647pgj.52.1668617668543; Wed, 16 Nov 2022 08:54:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668617668; cv=none; d=google.com; s=arc-20160816; b=Flo5iOS+yT1Mty6uBGF9OPM7JBISnIfJawHG2wpUymCPC4rZrLh0oaGQR1c7rgVW3a YwS08sPNPx34Sd49UdHYQP7x1kUL2Z7EbjA5ztEHY5M/2C5y1gB9IdfmZWdkeR5VrmAI LvaDp63PmYm3Lr4eL5faRxClYnqbb+MDRWnU7KTHSRSEPemg44VbzqHMt7JVva7/wCDe uudfGccTGw0MGZ/fFOjBIXixM9jhJe+tRqC6HnG5rphhV4OdDDsbC/HfBWbZZLLkVemX DMz5fGsY9s9690z/G9b7qghu/1iX17dyQvCvSA5slbnn4TpD40VAfVk/XvlIQHKFr+0d CVhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :message-id:subject:cc:to:from:date:dkim-signature; bh=Q2FmVIvKQ5VZ95KI6vxbUwgUQ5EYxWJ+jANy704XJi8=; b=SO2VyG5BBMU3D5L0RY2dXrk4ESSp7fX+fwb2Yi1IKnoT7901Pep9ZwDH3n8Ji58EfU p3hzCTkDTa8OT1nzYrsB+7ZXFBw5hKjZ49OPf2OQm2EduB2UU+HAIhQycY8RULP/YI5m PJgepuBgYVc+zMEPdYqQVScsP1MyWqLU7G69wt7kPm+TLI52T0K9rWUsB/KqnU/6h0eC R6H0Etts705JkUbG+77AntZWBiP1rD9UXFjGv9bFAhxmBdd2VBL+JcpdMWEUNOm5GS8v tKu4jNLWKIl2fSVQmyZShKBfdlU+zC1bJ6okD00ikp8488QEGroTPCFu/9Rk8B2JruSU lhPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=sZcXqH8U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j30-20020a63fc1e000000b0046edbb5b20esi15151087pgi.668.2022.11.16.08.54.16; Wed, 16 Nov 2022 08:54:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=sZcXqH8U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232778AbiKPQgo (ORCPT + 91 others); Wed, 16 Nov 2022 11:36:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233509AbiKPQgT (ORCPT ); Wed, 16 Nov 2022 11:36:19 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC82C4AF0F; Wed, 16 Nov 2022 08:29:06 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 73A9FB81DEC; Wed, 16 Nov 2022 16:29:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D47C0C433C1; Wed, 16 Nov 2022 16:29:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668616144; bh=hVb5cZ9h4Awq2TaSKDMFPSYVKSJauXtseNAwJdFPQTM=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=sZcXqH8UiU/elt5GvwYbh2B+DZGPqk1sud0NS7fEI0eViqdPkVb+879ylMHAugf+B C5+QqPsKMsYDb6sR3DqEvugc1GG0twBVU1LTdpOKNNj/1J9dVphQvJOfzV2YxAaxYN dQvudz5Ej3gJABS4RmWFtmjghcLuI05vzt/R+jXC02fkci8X6jJcU1+nEj5oJbYlES +ukBtYxfgEsupsfwAFOwMNk9cWfWug3zG3QVZj3upG1hZfG44cNyFrrUcOeFYusaKI 0zn0M3hyw1qDW/8FNj5lPRuyhS+0s/xbtMPrx3kG+7dLBqto5DiNz8bsGZ3CMuiTou A71jz0OhBH/Ww== Date: Wed, 16 Nov 2022 10:29:02 -0600 From: Bjorn Helgaas To: Thomas Gleixner Cc: LKML , x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: Re: [patch 33/39] PCI/MSI: Sanitize MSI-X checks Message-ID: <20221116162902.GA1116195@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221111122015.516946468@linutronix.de> X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 11, 2022 at 02:55:07PM +0100, Thomas Gleixner wrote: > There is no point in doing the same sanity checks over and over in a loop > during MSI-X enablement. Put them in front of the loop and return early > when they fail. > > Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas > --- > drivers/pci/msi/msi.c | 67 +++++++++++++++++++++++++------------------------- > 1 file changed, 34 insertions(+), 33 deletions(-) > > --- a/drivers/pci/msi/msi.c > +++ b/drivers/pci/msi/msi.c > @@ -721,47 +721,31 @@ static int msix_capability_init(struct p > return ret; > } > > -static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, > - int nvec, struct irq_affinity *affd, int flags) > +static bool pci_msix_validate_entries(struct msix_entry *entries, int nvec, int hwsize) > { > - int nr_entries; > int i, j; > > - if (!pci_msi_supported(dev, nvec) || dev->current_state != PCI_D0) > - return -EINVAL; > + if (!entries) > + return true; > > - nr_entries = pci_msix_vec_count(dev); > - if (nr_entries < 0) > - return nr_entries; > - if (nvec > nr_entries && !(flags & PCI_IRQ_VIRTUAL)) > - return nr_entries; > - > - if (entries) { > - /* Check for any invalid entries */ > - for (i = 0; i < nvec; i++) { > - if (entries[i].entry >= nr_entries) > - return -EINVAL; /* invalid entry */ > - for (j = i + 1; j < nvec; j++) { > - if (entries[i].entry == entries[j].entry) > - return -EINVAL; /* duplicate entry */ > - } > + for (i = 0; i < nvec; i++) { > + /* Entry within hardware limit? */ > + if (entries[i].entry >= hwsize) > + return false; > + > + /* Check for duplicate entries */ > + for (j = i + 1; j < nvec; j++) { > + if (entries[i].entry == entries[j].entry) > + return false; > } > } > - > - /* Check whether driver already requested for MSI IRQ */ > - if (dev->msi_enabled) { > - pci_info(dev, "can't enable MSI-X (MSI IRQ already assigned)\n"); > - return -EINVAL; > - } > - return msix_capability_init(dev, entries, nvec, affd); > + return true; > } > > -int __pci_enable_msix_range(struct pci_dev *dev, > - struct msix_entry *entries, int minvec, > - int maxvec, struct irq_affinity *affd, > - int flags) > +int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, > + int maxvec, struct irq_affinity *affd, int flags) > { > - int rc, nvec = maxvec; > + int hwsize, rc, nvec = maxvec; > > if (maxvec < minvec) > return -ERANGE; > @@ -774,6 +758,23 @@ int __pci_enable_msix_range(struct pci_d > if (WARN_ON_ONCE(dev->msix_enabled)) > return -EINVAL; > > + if (!pci_msi_supported(dev, nvec) || dev->current_state != PCI_D0) > + return -EINVAL; > + > + hwsize = pci_msix_vec_count(dev); > + if (hwsize < 0) > + return hwsize; > + > + if (!pci_msix_validate_entries(entries, nvec, hwsize)) > + return -EINVAL; > + > + /* PCI_IRQ_VIRTUAL is a horrible hack! */ > + if (nvec > hwsize && !(flags & PCI_IRQ_VIRTUAL)) > + nvec = hwsize; > + > + if (nvec < minvec) > + return -ENOSPC; > + > rc = pci_setup_msi_context(dev); > if (rc) > return rc; > @@ -785,7 +786,7 @@ int __pci_enable_msix_range(struct pci_d > return -ENOSPC; > } > > - rc = __pci_enable_msix(dev, entries, nvec, affd, flags); > + rc = msix_capability_init(dev, entries, nvec, affd); > if (rc == 0) > return nvec; > >