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From:   Fabrizio Castro <fabrizio.castro.jz@renesas.com>
To:     Wim Van Sebroeck <wim@linux-watchdog.org>,
        Guenter Roeck <linux@roeck-us.net>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Geert Uytterhoeven <geert+renesas@glider.be>
Cc:     Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org,
        Chris Paterson <Chris.Paterson2@renesas.com>,
        Biju Das <biju.das@bp.renesas.com>,
        linux-renesas-soc@vger.kernel.org,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Jacopo Mondi <jacopo@jmondi.org>
Subject: [PATCH 0/2] Reset related fixes for rzg2l_wdt
Date:   Thu, 17 Nov 2022 11:49:05 +0000
Message-Id: <20221117114907.138583-1-fabrizio.castro.jz@renesas.com>
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Dear All,

this series addresses a couple of issues found with the rzg2l_wdt
driver:
1) on the RZ/Five SoC it was observed that changing the timeout
   wouldn't reset the system as expected
2) on the RZ/V2M SoC it was observed that calling into the restart
   callback from the reboot command wouldn't reboot the system
   straight away

As it turns out, the RZ/Five watchdog IP requires the module clock
to be supplied during a reset.
On RZ/V2M, a specific procedure has to be followed to reset the
watchdog IP.

This series comes with two patches, one to fix the problem affecting
RZ/Five, and one to fix the problem affecting RZ/V2M.

Thanks,
Fab

Fabrizio Castro (1):
  watchdog: rzg2l_wdt: Handle TYPE-B reset for RZ/V2M

Lad Prabhakar (1):
  watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks

 drivers/watchdog/rzg2l_wdt.c | 45 +++++++++++++++++++++++++++++++-----
 1 file changed, 39 insertions(+), 6 deletions(-)

-- 
2.34.1