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Thu, 17 Nov 2022 16:14:45 +0000 Received: from SN6PR2101MB1693.namprd21.prod.outlook.com ([fe80::bd63:35dc:eb6e:3c9e]) by SN6PR2101MB1693.namprd21.prod.outlook.com ([fe80::bd63:35dc:eb6e:3c9e%8]) with mapi id 15.20.5857.007; Thu, 17 Nov 2022 16:14:45 +0000 From: "Michael Kelley (LINUX)" To: Wei Liu CC: "hpa@zytor.com" , KY Srinivasan , Haiyang Zhang , Dexuan Cui , "luto@kernel.org" , "peterz@infradead.org" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "lpieralisi@kernel.org" , "robh@kernel.org" , "kw@linux.com" , "bhelgaas@google.com" , "arnd@arndb.de" , "hch@infradead.org" , "m.szyprowski@samsung.com" , "robin.murphy@arm.com" , "thomas.lendacky@amd.com" , "brijesh.singh@amd.com" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , Tianyu Lan , "kirill.shutemov@linux.intel.com" , "sathyanarayanan.kuppuswamy@linux.intel.com" , "ak@linux.intel.com" , "isaku.yamahata@intel.com" , "Williams, Dan J" , "jane.chu@oracle.com" , "seanjc@google.com" , "tony.luck@intel.com" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-arch@vger.kernel.org" , "iommu@lists.linux.dev" Subject: RE: [Patch v3 13/14] PCI: hv: Add hypercalls to read/write MMIO space Thread-Topic: [Patch v3 13/14] PCI: hv: Add hypercalls to read/write MMIO space Thread-Index: AQHY+es8ed4NTpMKIkC2HrScaVa/VK5DO1YAgAAO7JA= Date: Thu, 17 Nov 2022 16:14:44 +0000 Message-ID: References: <1668624097-14884-1-git-send-email-mikelley@microsoft.com> <1668624097-14884-14-git-send-email-mikelley@microsoft.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=1b916e67-6612-420f-b8e5-935a432a8d45;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2022-11-17T16:10:02Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR2101MB1693.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: fe252482-78a9-47e5-8ca6-08dac8b6d75e X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Nov 2022 16:14:44.8778 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jQQ8MEzWIqwrtjE/H9z7/DXFVrXfD4Xxit2Dgel3hpOC/1RqZb0w/NjUN07BZlHxgZSOCna0pQuwD08cWXhhUk8uC9ZDJz9J0l3sFDefEnA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR21MB1512 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Wei Liu Sent: Thursday, November 17, 2022 7:17 A= M > > On Wed, Nov 16, 2022 at 10:41:36AM -0800, Michael Kelley wrote: > [...] > > > > +static void hv_pci_read_mmio(struct device *dev, phys_addr_t gpa, int = size, u32 > *val) > > +{ > > + struct hv_mmio_read_input *in; > > + struct hv_mmio_read_output *out; > > + u64 ret; > > + > > + /* > > + * Must be called with interrupts disabled so it is safe > > + * to use the per-cpu input argument page. Use it for > > + * both input and output. > > + */ >=20 > Perhaps adding something along this line? >=20 > WARN_ON(!irqs_disabled()); >=20 > I can fold this in if you agree. These two new functions are only called within this module from code that already has interrupts disabled (as added in Patch 14 of the series), so I didn't do the extra check. But I'm OK with adding it. These function= s make a hypercall, so the additional check doesn't have enough perf impact to matter. Michael >=20 > > + in =3D *this_cpu_ptr(hyperv_pcpu_input_arg); > > + out =3D *this_cpu_ptr(hyperv_pcpu_input_arg) + sizeof(*in); > > + in->gpa =3D gpa; > > + in->size =3D size; > > + > > + ret =3D hv_do_hypercall(HVCALL_MMIO_READ, in, out); > > + if (hv_result_success(ret)) { > > + switch (size) { > > + case 1: > > + *val =3D *(u8 *)(out->data); > > + break; > > + case 2: > > + *val =3D *(u16 *)(out->data); > > + break; > > + default: > > + *val =3D *(u32 *)(out->data); > > + break; > > + } > > + } else > > + dev_err(dev, "MMIO read hypercall error %llx addr %llx size %d\n", > > + ret, gpa, size); > > +} > > + > > +static void hv_pci_write_mmio(struct device *dev, phys_addr_t gpa, int= size, u32 > val) > > +{ > > + struct hv_mmio_write_input *in; > > + u64 ret; > > + > > + /* > > + * Must be called with interrupts disabled so it is safe > > + * to use the per-cpu input argument memory. > > + */ >=20 > Ditto. >=20 > Thanks, > Wei.