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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 35b7bad8-07d9-4dbd-6d3b-08dac97a8605 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Nov 2022 15:35:29.7416 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: A68J0QdTker6ZkpXTr4uATLuaqBZNQ61BsyO64R5DzXXD4Ig2OczubwHY2AhL5IL54U1gQLP7QLZ8bkyviUzOYc5EngCBDQr2O5mZOJY/Xg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR21MB3331 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jinank Jain Sent: Wednesday, Novembe= r 16, 2022 7:28 PM >=20 > According to TLFS, in order to communicate to L0 hypervisor there needs > to be an additional bit set in the control register. This communication > is required to perform priviledged instructions which can only be s/priviledged/privileged/ > performed by L0 hypervisor. An example of that could be setting up the > VMBus infrastructure. >=20 > Signed-off-by: Jinank Jain > --- > arch/x86/include/asm/hyperv-tlfs.h | 3 ++- > arch/x86/include/asm/mshyperv.h | 42 +++++++++++++++++++++++++++--- > include/asm-generic/hyperv-tlfs.h | 1 + > 3 files changed, 41 insertions(+), 5 deletions(-) >=20 > diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hy= perv-tlfs.h > index b5019becb618..7758c495541d 100644 > --- a/arch/x86/include/asm/hyperv-tlfs.h > +++ b/arch/x86/include/asm/hyperv-tlfs.h > @@ -380,7 +380,8 @@ struct hv_nested_enlightenments_control { > __u32 reserved:31; > } features; > struct { > - __u32 reserved; > + __u32 inter_partition_comm:1; > + __u32 reserved:31; > } hypercallControls; > } __packed; >=20 > diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyp= erv.h > index 326d699b30d5..42e42cea0384 100644 > --- a/arch/x86/include/asm/mshyperv.h > +++ b/arch/x86/include/asm/mshyperv.h > @@ -74,10 +74,16 @@ static inline u64 hv_do_hypercall(u64 control, void *= input, void > *output) > return hv_status; > } >=20 > +/* Hypercall to the L0 hypervisor */ > +static inline u64 hv_do_nested_hypercall(u64 control, void *input, void = *output) > +{ > + return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output); > +} > + > /* Fast hypercall with 8 bytes of input and no output */ > -static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1) > +static inline u64 _hv_do_fast_hypercall8(u64 control, u16 code, u64 inpu= t1) > { > - u64 hv_status, control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + u64 hv_status; >=20 > #ifdef CONFIG_X86_64 > { > @@ -105,10 +111,24 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u= 64 input1) > return hv_status; > } >=20 > +static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + > + return _hv_do_fast_hypercall8(control, code, input1); > +} > + > +static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT | > HV_HYPERCALL_NESTED; > + > + return _hv_do_fast_hypercall8(control, code, input1); > +} > + > /* Fast hypercall with 16 bytes of input */ > -static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input= 2) > +static inline u64 _hv_do_fast_hypercall16(u64 control, u16 code, u64 inp= ut1, u64 > input2) > { > - u64 hv_status, control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + u64 hv_status; >=20 > #ifdef CONFIG_X86_64 > { > @@ -139,6 +159,20 @@ static inline u64 hv_do_fast_hypercall16(u16 code, u= 64 input1, > u64 input2) > return hv_status; > } >=20 > +static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input= 2) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + > + return _hv_do_fast_hypercall16(control, code, input1, input2); > +} > + > +static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u6= 4 input2) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT | > HV_HYPERCALL_NESTED; > + > + return _hv_do_fast_hypercall16(control, code, input1, input2); > +} > + > extern struct hv_vp_assist_page **hv_vp_assist_page; >=20 > static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned i= nt cpu) > diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hype= rv-tlfs.h > index b17c6eeb9afa..e61ee461c4fc 100644 > --- a/include/asm-generic/hyperv-tlfs.h > +++ b/include/asm-generic/hyperv-tlfs.h > @@ -194,6 +194,7 @@ enum HV_GENERIC_SET_FORMAT { > #define HV_HYPERCALL_VARHEAD_OFFSET 17 > #define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17) > #define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27) > +#define HV_HYPERCALL_NESTED BIT_ULL(31) > #define HV_HYPERCALL_REP_COMP_OFFSET 32 > #define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32) > #define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32) > -- > 2.25.1