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Fri, 18 Nov 2022 15:41:33 +0000 Received: from BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::1e50:78ec:6954:d6dd]) by BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::1e50:78ec:6954:d6dd%4]) with mapi id 15.20.5857.008; Fri, 18 Nov 2022 15:41:32 +0000 From: "Michael Kelley (LINUX)" To: Jinank Jain , Jinank Jain CC: KY Srinivasan , Haiyang Zhang , "wei.liu@kernel.org" , Dexuan Cui , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" , "arnd@arndb.de" , "peterz@infradead.org" , "jpoimboe@kernel.org" , "seanjc@google.com" , "kirill.shutemov@linux.intel.com" , "ak@linux.intel.com" , "sathyanarayanan.kuppuswamy@linux.intel.com" , "linux-hyperv@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arch@vger.kernel.org" , "anrayabh@linux.microsoft.com" Subject: RE: [PATCH v4 5/5] x86/hyperv: Change interrupt vector for nested root partition Thread-Topic: [PATCH v4 5/5] x86/hyperv: Change interrupt vector for nested root partition Thread-Index: AQHY+jSrGM61zYIyYkSIBuTFWlgcbK5E0tNQ Date: Fri, 18 Nov 2022 15:41:32 +0000 Message-ID: References: <42848accc9dbe87a48a0f2ceb7ae9294452bda68.1668618583.git.jinankjain@linux.microsoft.com> In-Reply-To: <42848accc9dbe87a48a0f2ceb7ae9294452bda68.1668618583.git.jinankjain@linux.microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=9b4cdcbe-3d2a-412c-9c4c-d6c2d7e87f4f;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2022-11-18T15:37:08Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9d993aee-5de8-47ce-362c-08dac97b5e6c X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Nov 2022 15:41:32.8188 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: IM8f02wSX6B6wiavSUgSdt+PQ2/5DRPKdK4QXq9vbCl3//H64TeH9jGzyHWQ2jZHFX24SeZnWYvJ3c1ZoySYDvjbegVXXuJsBtrWGQxTKLM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR21MB3331 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jinank Jain Sent: Wednesday, Novembe= r 16, 2022 7:28 PM >=20 > Traditionally we have been using the HYPERVISOR_CALLBACK_VECTOR to relay > the VMBus interrupt. But this does not work in case of nested > hypervisor. Microsoft Hypervisor reserves 0x31 to 0x34 as the interrupt > vector range for VMBus and thus we have to use one of the vectors from > that range and setup the IDT accordingly. >=20 > Signed-off-by: Jinank Jain > --- > arch/x86/include/asm/idtentry.h | 2 ++ > arch/x86/include/asm/irq_vectors.h | 6 ++++++ > arch/x86/kernel/cpu/mshyperv.c | 15 +++++++++++++++ > arch/x86/kernel/idt.c | 9 +++++++++ > drivers/hv/vmbus_drv.c | 3 ++- > 5 files changed, 34 insertions(+), 1 deletion(-) >=20 > diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idten= try.h > index 72184b0b2219..c0648e3e4d4a 100644 > --- a/arch/x86/include/asm/idtentry.h > +++ b/arch/x86/include/asm/idtentry.h > @@ -686,6 +686,8 @@ DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_NESTED_VECTOR, > sysvec_kvm_posted_intr_nested > DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR, > sysvec_hyperv_callback); > DECLARE_IDTENTRY_SYSVEC(HYPERV_REENLIGHTENMENT_VECTOR, > sysvec_hyperv_reenlightenment); > DECLARE_IDTENTRY_SYSVEC(HYPERV_STIMER0_VECTOR, > sysvec_hyperv_stimer0); > +DECLARE_IDTENTRY_SYSVEC(HYPERV_INTR_NESTED_VMBUS_VECTOR, > + sysvec_hyperv_nested_vmbus_intr); > #endif >=20 > #if IS_ENABLED(CONFIG_ACRN_GUEST) > diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/ir= q_vectors.h > index 43dcb9284208..729d19eab7f5 100644 > --- a/arch/x86/include/asm/irq_vectors.h > +++ b/arch/x86/include/asm/irq_vectors.h > @@ -102,6 +102,12 @@ > #if IS_ENABLED(CONFIG_HYPERV) > #define HYPERV_REENLIGHTENMENT_VECTOR 0xee > #define HYPERV_STIMER0_VECTOR 0xed > +/* > + * FIXME: Change this, once Microsoft Hypervisor changes its assumption > + * around VMBus interrupt vector allocation for nested root partition. > + * Or provides a better interface to detect this instead of hardcoding. > + */ > +#define HYPERV_INTR_NESTED_VMBUS_VECTOR 0x31 > #endif >=20 > #define LOCAL_TIMER_VECTOR 0xec > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyper= v.c > index 3e6711a6af6b..ec7fef43e03b 100644 > --- a/arch/x86/kernel/cpu/mshyperv.c > +++ b/arch/x86/kernel/cpu/mshyperv.c > @@ -110,6 +110,21 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback) > set_irq_regs(old_regs); > } >=20 > +DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_nested_vmbus_intr) > +{ > + struct pt_regs *old_regs =3D set_irq_regs(regs); > + > + inc_irq_stat(irq_hv_callback_count); > + > + if (vmbus_handler) > + vmbus_handler(); > + > + if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) > + ack_APIC_irq(); > + > + set_irq_regs(old_regs); > +} > + > void hv_setup_vmbus_handler(void (*handler)(void)) > { > vmbus_handler =3D handler; > diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c > index a58c6bc1cd68..ace648856a0b 100644 > --- a/arch/x86/kernel/idt.c > +++ b/arch/x86/kernel/idt.c > @@ -160,6 +160,15 @@ static const __initconst struct idt_data apic_idts[]= =3D { > # endif > INTG(SPURIOUS_APIC_VECTOR, > asm_sysvec_spurious_apic_interrupt), > INTG(ERROR_APIC_VECTOR, asm_sysvec_error_interrupt), > +#ifdef CONFIG_HYPERV > + /* > + * This is a hack because we cannot install this interrupt handler via = alloc_intr_gate > + * as it does not allow interrupt vector less than FIRST_SYSTEM_VECTORS= . And hyperv > + * does not want anything other than 0x31-0x34 as the interrupt vector = for vmbus > + * interrupt in case of nested setup. > + */ > + INTG(HYPERV_INTR_NESTED_VMBUS_VECTOR, > asm_sysvec_hyperv_nested_vmbus_intr), > +#endif > #endif > }; >=20 > diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c > index 0937877eade9..c1477f3a08dd 100644 > --- a/drivers/hv/vmbus_drv.c > +++ b/drivers/hv/vmbus_drv.c > @@ -2767,7 +2767,8 @@ static int __init hv_acpi_init(void) > * normal Linux IRQ mechanism is not used in this case. > */ > #ifdef HYPERVISOR_CALLBACK_VECTOR > - vmbus_interrupt =3D HYPERVISOR_CALLBACK_VECTOR; > + vmbus_interrupt =3D hv_nested ? HYPERV_INTR_NESTED_VMBUS_VECTOR : > + HYPERVISOR_CALLBACK_VECTOR; > vmbus_irq =3D -1; > #endif >=20 > -- > 2.25.1 Given the backdrop that this is a real hack due to MSHV limitations, this looks OK to me. But someone on the x86 side will have to weigh in on whether this will break anything in x86 vector management. A somewhat dubious, Reviewed-by: Michael Kelley