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Fri, 18 Nov 2022 08:29:41 -0800 (PST) X-Received: by 2002:a25:abe4:0:b0:6e7:cbc4:1ac3 with SMTP id v91-20020a25abe4000000b006e7cbc41ac3mr5843258ybi.559.1668788981430; Fri, 18 Nov 2022 08:29:41 -0800 (PST) MIME-Version: 1.0 References: <20221118010627.70576-1-hal.feng@starfivetech.com> <20221118010627.70576-4-hal.feng@starfivetech.com> In-Reply-To: <20221118010627.70576-4-hal.feng@starfivetech.com> From: Emil Renner Berthing Date: Fri, 18 Nov 2022 17:29:25 +0100 Message-ID: Subject: Re: [PATCH v2 03/14] reset: Create subdirectory for StarFive drivers To: Hal Feng Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Michael Turquette , Philipp Zabel , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 18 Nov 2022 at 02:06, Hal Feng wrote: > > From: Emil Renner Berthing > > This moves the StarFive JH7100 reset driver to a new subdirectory in > preparation for adding more StarFive reset drivers. > > Signed-off-by: Emil Renner Berthing > Signed-off-by: Hal Feng > --- > MAINTAINERS | 4 ++-- > drivers/reset/Kconfig | 8 +------- > drivers/reset/Makefile | 2 +- > drivers/reset/starfive/Kconfig | 8 ++++++++ > drivers/reset/starfive/Makefile | 2 ++ > drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0 > 6 files changed, 14 insertions(+), 10 deletions(-) > create mode 100644 drivers/reset/starfive/Kconfig > create mode 100644 drivers/reset/starfive/Makefile > rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%) > > diff --git a/MAINTAINERS b/MAINTAINERS > index d43daa89d5f1..e6f1060e7964 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -19613,11 +19613,11 @@ F: Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml > F: drivers/pinctrl/starfive/ > F: include/dt-bindings/pinctrl/pinctrl-starfive-jh7100.h > > -STARFIVE JH7100 RESET CONTROLLER DRIVER > +STARFIVE JH7100 RESET CONTROLLER DRIVERS > M: Emil Renner Berthing > S: Maintained > F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml > -F: drivers/reset/reset-starfive-jh7100.c > +F: drivers/reset/starfive/ When this entry covers all StarFive reset drivers the header should also match. Eg. STARFIVE RESET CONTROLLER DRIVERS > F: include/dt-bindings/reset/starfive-jh7100.h > > STATIC BRANCH/CALL > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig > index de176c2fbad9..1e8e1c4954cd 100644 > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -232,13 +232,6 @@ config RESET_SOCFPGA > This enables the reset driver for the SoCFPGA ARMv7 platforms. This > driver gets initialized early during platform init calls. > > -config RESET_STARFIVE_JH7100 > - bool "StarFive JH7100 Reset Driver" > - depends on SOC_STARFIVE || COMPILE_TEST > - default SOC_STARFIVE > - help > - This enables the reset controller driver for the StarFive JH7100 SoC. > - > config RESET_SUNPLUS > bool "Sunplus SoCs Reset Driver" if COMPILE_TEST > default ARCH_SUNPLUS > @@ -320,6 +313,7 @@ config RESET_ZYNQ > help > This enables the reset controller driver for Xilinx Zynq SoCs. > > +source "drivers/reset/starfive/Kconfig" > source "drivers/reset/sti/Kconfig" > source "drivers/reset/hisilicon/Kconfig" > source "drivers/reset/tegra/Kconfig" > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile > index 3e7e5fd633a8..fee17a0e3a16 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -1,6 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0 > obj-y += core.o > obj-y += hisilicon/ > +obj-$(CONFIG_SOC_STARFIVE) += starfive/ > obj-$(CONFIG_ARCH_STI) += sti/ > obj-$(CONFIG_ARCH_TEGRA) += tegra/ > obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o > @@ -30,7 +31,6 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o > obj-$(CONFIG_RESET_SCMI) += reset-scmi.o > obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o > obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o > -obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o > obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o > obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o > obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o > diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig > new file mode 100644 > index 000000000000..cddebdba7177 > --- /dev/null > +++ b/drivers/reset/starfive/Kconfig > @@ -0,0 +1,8 @@ > +# SPDX-License-Identifier: GPL-2.0-only > + > +config RESET_STARFIVE_JH7100 > + bool "StarFive JH7100 Reset Driver" > + depends on SOC_STARFIVE || COMPILE_TEST > + default SOC_STARFIVE > + help > + This enables the reset controller driver for the StarFive JH7100 SoC. > diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile > new file mode 100644 > index 000000000000..670d049423f5 > --- /dev/null > +++ b/drivers/reset/starfive/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o > diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c > similarity index 100% > rename from drivers/reset/reset-starfive-jh7100.c > rename to drivers/reset/starfive/reset-starfive-jh7100.c > -- > 2.38.1 >