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To:     Geert Uytterhoeven <geert@linux-m68k.org>
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Subject: Re: [PATCH v8 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD
 Pensando Elba System Resource chip
Thread-Topic: [PATCH v8 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD
 Pensando Elba System Resource chip
Thread-Index: AQHY+fMz1mOoRsElvEWbbkYxqhL2uK5CIjyAgAAkCRyAAR9miYAA+d0AgACg5DU=
Date:   Fri, 18 Nov 2022 18:29:46 +0000
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[AMD Official Use Only - General]

Hi Geert,

From: Geert Uytterhoeven <geert@linux-m68k.org>
Sent: Friday, November 18, 2022 12:42 AM
> ...
> > &spi0 {
> >         #address-cells =3D <1>;
> >         #size-cells =3D <0>;
> >         num-cs =3D <4>;
> >         cs-gpios =3D <0>, <0>, <&porta 1 GPIO_ACTIVE_LOW>,
> >                    <&porta 7 GPIO_ACTIVE_LOW>;
> >         status =3D "okay";
> >
> >         rstc: system-controller@0 {
> >                 compatible =3D "amd,pensando-elbasr";
> >                 reg =3D <0>;
> >                 spi-max-frequency =3D <12000000>;
> >                 #reset-cells =3D <1>;
> >         };
> >
> >         system-controller@1 {
> >                 compatible =3D "amd,pensando-elbasr";
> >                 reg =3D <1>;
> >                 spi-max-frequency =3D <12000000>;
> >         };
> >
> >         system-controller@2 {
> >                 compatible =3D "amd,pensando-elbasr";
> >                 reg =3D <2>;
> >                 spi-max-frequency =3D <12000000>;
> >                 interrupt-parent =3D <&porta>;
> >                 interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>;
> >         };
> >
> >         system-controller@3 {
> >                 compatible =3D "amd,pensando-elbasr";
> >                 reg =3D <3>;
> >                 spi-max-frequency =3D <12000000>;
> >         };
>
> The above describes 4 individual but further identical (they have the
> same compatible value) devices, while above you say they are not identica=
l:
>
>     The IP at CS0 is a bunch of miscellaneous mgmt registers.
>     CS1 is a designware I2C master/slave.
>     CS2 is a Lattice dual I2C master.
>     CS3 is internal storage for the CPLD or FPGA depending on the
> hardware implementation.
>
> So either this should be modelled as a single subnode with 4 chip
> selects[*]:
>
>         system-controller@0 {
>                 compatible =3D "amd,pensando-elbasr";
>                 reg =3D <0 1 2 3 4>;
>                 spi-max-frequency =3D <12000000>;
>                 #reset-cells =3D <1>;
>         };
>
> or as 4 separate subnodes, each using 4 different compatible values.
> Giving the wildly different functionalities provided by each, you also ne=
ed
> 4 binding documents.
>
> [*] I'm not sure the Linux SPI core actually supports this yet.

Thanks, I was unfamiliar with reg <0 ...> with differences between
the nodes such as reset-cells for one and interrupts on another.
Below dts boots ok and will change binding and driver as needed.

&spi0 {
        #address-cells =3D <1>;
        #size-cells =3D <0>;
        num-cs =3D <4>;
        cs-gpios =3D <0>, <0>, <&porta 1 GPIO_ACTIVE_LOW>,
                   <&porta 7 GPIO_ACTIVE_LOW>;
        status =3D "okay";

        rstc: system-controller@0 {
                compatible =3D "amd,pensando-elbasr";
                reg =3D <0 1 2 3>;
                spi-max-frequency =3D <12000000>;
                interrupt-parent =3D <&porta>;
                interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>;
                #reset-cells =3D <1>;
        };
};

Regards,
Brad