Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp1036694rwb; Fri, 18 Nov 2022 11:43:32 -0800 (PST) X-Google-Smtp-Source: AA0mqf5djeAMI/QQOltecMPIizCrLJQ8j/0ZWCwnTqIk4iIECoJUeCRm/p2UNMErGUzV5UEtv1vB X-Received: by 2002:a63:5b0e:0:b0:476:c832:aa74 with SMTP id p14-20020a635b0e000000b00476c832aa74mr8121574pgb.456.1668800611821; Fri, 18 Nov 2022 11:43:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668800611; cv=none; d=google.com; s=arc-20160816; b=H80/QfwJ1+0h3KA9lkmZCRq/TJGuJVDyqd9AfxtcBZ1Q0xeSq5QaqXxp06QoMu14XF HTycD17fkeGMcQh8gBpq1cNtWv2Ue/LGvzeovqElb02R9Iiy4hVesIEcX304yPEscspD 7VcPga/2q+ztYWGPJOAnyPpIylQoKlUnjSu2/IGYcmg6emPjCjC6LeAc/fcN81xRh3BO OsBoyOKdqhdPWgsa/V9yGwa0mrFs5JD++Ncozs6EuvIpVHoY/ZNVwTrH3uL7DrzF7hUo RBF8GYSe2v9Z3aVZVurEtmVpVXeoZ9lq/E23pKfScxApXOJ2ZbSDYSfwYuTQHgmvDglu +KaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rLXaSi0nuYISQNA4/ZZOAgFRiUbo5QoSWGShK+kyzL8=; b=jyBebh7n+xQ6Ej+68BUvCxEwYu1myTnhnuo2dZjT1wx8KqQXzjS81vOWlaFOlnsk+Z FuLDDa3G1m5YARyx8vbR3l9Oi9Te3uQTtVxE5rJPZrXHfq+Fh/9OIE6DQoNZ3k09EJIM FzUbr3HvwN0A/Ak8W+galXhj/1/RXGkQ8fOWsfW1CJxHN70uh+VeH3Q3IHnjvfUqOljA v/8qosc/zuisGgYuS6FUbmDSNlUbml/dulOMUTcp7pIKZPj2n45kGRieHIe0UEfb19/t VjVkvZS8gN8XiJ7yckFJCFPbeoLQw1nbhZi2kjlLAkbVjIq+fgIOwLJk68HbKiFPfTuv brdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=RzpUfc38; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id px8-20020a17090b270800b0020de23fa58csi7653783pjb.12.2022.11.18.11.43.20; Fri, 18 Nov 2022 11:43:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=RzpUfc38; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242970AbiKRTC3 (ORCPT + 90 others); Fri, 18 Nov 2022 14:02:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242959AbiKRTBx (ORCPT ); Fri, 18 Nov 2022 14:01:53 -0500 Received: from mxout3.routing.net (mxout3.routing.net [IPv6:2a03:2900:1:a::8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 091EA2FFFC; Fri, 18 Nov 2022 11:01:39 -0800 (PST) Received: from mxbulk.masterlogin.de (unknown [192.168.10.85]) by mxout3.routing.net (Postfix) with ESMTP id 41062604DC; Fri, 18 Nov 2022 19:01:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1668798098; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rLXaSi0nuYISQNA4/ZZOAgFRiUbo5QoSWGShK+kyzL8=; b=RzpUfc38A2J1HvklQknH14z6OqQdbFlIs+cswd/DJsnTKTaQDBe65Dp0iNk7+Oo57WLr1e KdTjCZ4R5VTq4apKt9ccuiMWk4maCRq8LvhhdmWjGWVx9XMLtOFtXV1yLorZEiFMrOmZnB 7KYY0XdG1K0Cfz6bgu1sZ+qrN+7PG4M= Received: from frank-G5.. (fttx-pool-80.245.77.125.bambit.de [80.245.77.125]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id E1F5C1226BC; Fri, 18 Nov 2022 19:01:37 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih , AngeloGioacchino Del Regno Subject: [PATCH v6 06/11] arm64: dts: mt7986: add spi related device nodes Date: Fri, 18 Nov 2022 20:01:21 +0100 Message-Id: <20221118190126.100895-7-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221118190126.100895-1-linux@fw-web.de> References: <20221118190126.100895-1-linux@fw-web.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sam Shih This patch adds spi support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 35 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 28 ++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 35 ++++++++++++++++++++ 3 files changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 2f48cc3d3ddb..006878e3f2b2 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -59,6 +59,20 @@ switch: switch@0 { }; &pio { + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_2"; + }; + }; + uart1_pins: uart1-pins { mux { function = "uart"; @@ -105,6 +119,27 @@ conf { }; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + &switch { ports { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index afc01abfa99c..29da9b8ed753 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -253,6 +253,34 @@ i2c0: i2c@11008000 { status = "disabled"; }; + spi0: spi@1100a000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MPLL_D2>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_INFRA_SPI0_CK>, + <&infracfg CLK_INFRA_SPI0_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + + spi1: spi@1100b000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100b000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MPLL_D2>, + <&topckgen CLK_TOP_SPIM_MST_SEL>, + <&infracfg CLK_INFRA_SPI1_CK>, + <&infracfg CLK_INFRA_SPI1_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + ethsys: syscon@15000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 79c5c78f7a14..2c7f1d4fb352 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -100,6 +100,20 @@ fixed-link { }; &pio { + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_2"; + }; + }; + wf_2g_5g_pins: wf-2g-5g-pins { mux { function = "wifi"; @@ -132,6 +146,27 @@ conf { }; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + &uart0 { status = "okay"; }; -- 2.34.1