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[72.77.81.136]) by smtp.gmail.com with ESMTPSA id fa9-20020a05622a4cc900b0039cc944ebdasm6731297qtb.54.2022.11.21.06.07.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Nov 2022 06:07:37 -0800 (PST) Date: Mon, 21 Nov 2022 09:07:35 -0500 From: "Gabriel L. Somlo" To: Jiri Slaby Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, gregkh@linuxfoundation.org, kgugala@antmicro.com, mholenko@antmicro.com, joel@jms.id.au, david.abdurachmanov@gmail.com, florent@enjoy-digital.fr, geert@linux-m68k.org, ilpo.jarvinen@linux.intel.com Subject: Re: [PATCH v5 13/14] serial: liteuart: add IRQ support for the TX path Message-ID: References: <20221118145512.509950-1-gsomlo@gmail.com> <20221118145512.509950-14-gsomlo@gmail.com> <7e2e76f8-5d88-4df4-2335-9f7b129b2e26@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <7e2e76f8-5d88-4df4-2335-9f7b129b2e26@kernel.org> X-Clacks-Overhead: GNU Terry Pratchett X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 21, 2022 at 09:58:41AM +0100, Jiri Slaby wrote: > On 18. 11. 22, 15:55, Gabriel Somlo wrote: > > Switch the TX path to IRQ-driven operation, while maintaining support > > for polling mode via the poll timer. > > > > Signed-off-by: Gabriel Somlo > > Reviewed-by: Ilpo J?rvinen > ... > > @@ -154,6 +148,8 @@ static irqreturn_t liteuart_interrupt(int irq, void *data) > > isr = litex_read8(port->membase + OFF_EV_PENDING) & uart->irq_reg; > > if (isr & EV_RX) > > liteuart_rx_chars(port); > > + if (isr & EV_TX) > > + liteuart_tx_chars(port); > > Wait, how do you ensure the OFF_EV_PENDING reg contains EV_RX and/or EV_TX > in the polling mode? The hardware (well, *gateware*) is coded to populate the EV_PENDING register regardless of whether IRQs are enabled via the EV_ENABLE register (or indeed, whether IRQs are even "wired into" the design at all). See https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/uart.py and https://github.com/enjoy-digital/litex/blob/master/litex/soc/interconnect/csr_eventmanager.py for a starting point on why it's OK to just assume that... Thanks, --Gabriel