Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Tudor Ambarus <tudor.ambarus@microchip.com>
To:     <pratyush@kernel.org>, <michael@walle.cc>,
        <yaliang.wang@windriver.com>, <richard@nod.at>,
        <cyrille.pitchen@wedev4u.fr>, <vigneshr@ti.com>,
        <andy.yan@rock-chips.com>, <miquel.raynal@bootlin.com>
CC:     Tudor Ambarus <tudor.ambarus@microchip.com>,
        <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 0/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
Date:   Mon, 21 Nov 2022 16:32:07 +0200
Message-ID: <166904099810.93917.2481343672925708577.b4-ty@microchip.com>
In-Reply-To: <20221016171901.1483542-1-yaliang.wang@windriver.com>
References: <1dddc60f-44fd-df65-f491-be8379fe2380@microchip.com> <20221016171901.1483542-1-yaliang.wang@windriver.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 8bit
Precedence: bulk

On Mon, 17 Oct 2022 01:19:00 +0800, yaliang.wang@windriver.com wrote:
> GD25Q256 'C' generation 'GD25Q256C' implements the JESD216 standards,
> JESD216 doesn't define the QER field in BFPT, but the 'GD25Q256C'
> does define QE bit in status register 1 bit 6, so we need to tweak
> quad_enable to properly set the function.
> 
> 'D' and 'E' generations implement the JESD216B standards, so parsing
> the SFDP to set quad_enable function is enough for them.
> 
> [...]

Updated comment in gd25q256_post_bfpt and applied to spi-nor/next, thanks!

[1/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
      https://git.kernel.org/mtd/c/4dc49062a7e9

Best regards,
-- 
Tudor Ambarus <tudor.ambarus@microchip.com>