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Mon, 21 Nov 2022 16:40:16 +0000 Received: from BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::1e50:78ec:6954:d6dd]) by BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::1e50:78ec:6954:d6dd%5]) with mapi id 15.20.5880.001; Mon, 21 Nov 2022 16:40:16 +0000 From: "Michael Kelley (LINUX)" To: Borislav Petkov CC: "hpa@zytor.com" , KY Srinivasan , Haiyang Zhang , "wei.liu@kernel.org" , Dexuan Cui , "luto@kernel.org" , "peterz@infradead.org" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "lpieralisi@kernel.org" , "robh@kernel.org" , "kw@linux.com" , "bhelgaas@google.com" , "arnd@arndb.de" , "hch@infradead.org" , "m.szyprowski@samsung.com" , "robin.murphy@arm.com" , "thomas.lendacky@amd.com" , "brijesh.singh@amd.com" , "tglx@linutronix.de" , "mingo@redhat.com" , "dave.hansen@linux.intel.com" , Tianyu Lan , "kirill.shutemov@linux.intel.com" , "sathyanarayanan.kuppuswamy@linux.intel.com" , "ak@linux.intel.com" , "isaku.yamahata@intel.com" , "Williams, Dan J" , "jane.chu@oracle.com" , "seanjc@google.com" , "tony.luck@intel.com" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-arch@vger.kernel.org" , "iommu@lists.linux.dev" Subject: RE: [Patch v3 01/14] x86/ioremap: Fix page aligned size calculation in __ioremap_caller() Thread-Topic: [Patch v3 01/14] x86/ioremap: Fix page aligned size calculation in __ioremap_caller() Thread-Index: AQHY+esrEByVeSYqBke7qvqW2Lryi65JZ64AgAAvazA= Date: Mon, 21 Nov 2022 16:40:16 +0000 Message-ID: References: <1668624097-14884-1-git-send-email-mikelley@microsoft.com> <1668624097-14884-2-git-send-email-mikelley@microsoft.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=ea3446ce-dab2-4f43-930f-c20e1e21c575;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2022-11-21T16:22:37Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 91ca6400-fbc4-4994-9f0e-08dacbdf11db X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Nov 2022 16:40:16.3629 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: CY4DXEAGCpJVdExDrDMHCtYHkfCPPCanMNViuTLjr2j6Qiah9CIHEh5NNazTqhXe9WnnqC5ibTc4Y/N3tywbNRlAMtj8RL64+uwYaG9xSlg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR21MB1445 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Borislav Petkov Sent: Monday, November 21, 2022 5:33 A= M >=20 > On Wed, Nov 16, 2022 at 10:41:24AM -0800, Michael Kelley wrote: > > Current code re-calculates the size after aligning the starting and > > ending physical addresses on a page boundary. But the re-calculation > > also embeds the masking of high order bits that exceed the size of > > the physical address space (via PHYSICAL_PAGE_MASK). If the masking > > removes any high order bits, the size calculation results in a huge > > value that is likely to immediately fail. > > > > Fix this by re-calculating the page-aligned size first. Then mask any > > high order bits using PHYSICAL_PAGE_MASK. > > > > Signed-off-by: Michael Kelley > > --- > > arch/x86/mm/ioremap.c | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c > > index 78c5bc6..6453fba 100644 > > --- a/arch/x86/mm/ioremap.c > > +++ b/arch/x86/mm/ioremap.c > > @@ -217,9 +217,15 @@ static void __ioremap_check_mem(resource_size_t ad= dr, > unsigned long size, > > * Mappings have to be page-aligned > > */ > > offset =3D phys_addr & ~PAGE_MASK; > > - phys_addr &=3D PHYSICAL_PAGE_MASK; > > + phys_addr &=3D PAGE_MASK; > > size =3D PAGE_ALIGN(last_addr+1) - phys_addr; > > > > + /* > > + * Mask out any bits not part of the actual physical > > + * address, like memory encryption bits. > > + */ > > + phys_addr &=3D PHYSICAL_PAGE_MASK; > > + > > retval =3D memtype_reserve(phys_addr, (u64)phys_addr + size, > > pcm, &new_pcm); > > if (retval) { > > -- >=20 > This looks like a fix to me that needs to go to independently to stable. > And it would need a Fixes tag. >=20 > /me does some git archeology... >=20 > I guess this one: >=20 > ffa71f33a820 ("x86, ioremap: Fix incorrect physical address handling in P= AE mode") >=20 > should be old enough so that it goes to all relevant stable kernels... >=20 > Hmm? >=20 As discussed in a parallel thread [1], the incorrect code here doesn't have any real impact in already released Linux kernels. It only affects the transition that my patch series implements to change the way vTOM is handled. I don't know what the tradeoffs are for backporting a fix that doesn't solv= e a real problem vs. just letting it be. Every backport carries some overhea= d in the process and there's always a non-zero risk of breaking something. I've leaned away from adding the "Fixes:" tag in such cases. But if it's b= etter to go ahead and add the "Fixes:" tag for what's only a theoretical problem, I'm OK with doing so. Michael [1] https://lkml.org/lkml/2022/11/11/1348