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From:   Joel Stanley <joel@jms.id.au>
Date:   Tue, 22 Nov 2022 01:40:42 +0000
Message-ID: <CACPK8XdXrAPMdnn0T6GQiYEK3R4MvwprOZu_Yvmv=WVOfivROg@mail.gmail.com>
Subject: Re: [PATCH v5 0/6] Nuvoton WPCM450 clock and reset driver
To:     =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>,
        Stephen Boyd <sboyd@kernel.org>, Arnd Bergmann <arnd@arndb.de>
Cc:     linux-clk@vger.kernel.org, openbmc@lists.ozlabs.org,
        devicetree@vger.kernel.org,
        Wim Van Sebroeck <wim@linux-watchdog.org>,
        linux-watchdog@vger.kernel.org,
        Patrick Venture <venture@google.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        linux-kernel@vger.kernel.org, Avi Fishman <avifishman70@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Benjamin Fair <benjaminfair@google.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        Tali Perry <tali.perry1@gmail.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Guenter Roeck <linux@roeck-us.net>,
        Tomer Maimon <tmaimon77@gmail.com>
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On Fri, 4 Nov 2022 at 16:21, Jonathan Neusch=C3=A4fer <j.neuschaefer@gmx.ne=
t> wrote:
>
> This series adds support for the clock and reset controller in the Nuvoto=
n
> WPCM450 SoC. This means that the clock rates for peripherals will be calc=
ulated
> automatically based on the clock tree as it was preconfigured by the boot=
loader.
> The 24 MHz dummy clock, that is currently in the devicetree, is no longer=
 needed.
> Somewhat unfortunately, this also means that there is a breaking change o=
nce
> the devicetree starts relying on the clock driver, but I find it acceptab=
le in
> this case, because WPCM450 is still at a somewhat early stage.

Reviewed-by: Joel Stanley <joel@jms.id.au>

>
>
> Upstreaming plan (although other suggestions are welcome):
>
> Once reviewed,
>
> - The ARM/dts changes should go through Joel Stanley's bmc tree

I've picked up the standalone patch ("Add clock controller node").

> - The clocksource/timer changes should probably go via Daniel Lezcano and=
 TIP
> - The clock controller bindings and driver should go through the clk tree

Stephen, do you plan on merging this driver for v6.2?

Alternatively, could we get an ack from you and merge this entire
series through Arnd, where we have precedent for merging these initial
support cross-tree patch sets?


> - It probably makes sense to delay the final ARM/dts patch ("ARM: dts:
>   wpcm450: Switch clocks to clock controller") until next cycle to make
>   sure it is merged after the clock driver.
>
>
> v5:
> - Dropped patch 2 (watchdog: npcm: Enable clock if provided), which
>   was since merged upstream
> - Added patch 2 (clocksource: timer-npcm7xx: Enable timer 1 clock before =
use) again,
>   because I wasn't able to find it in linux-next
> - Switched the driver to using struct clk_parent_data
> - Rebased on 6.1-rc3
>
> v4:
> - https://lore.kernel.org/lkml/20220610072141.347795-1-j.neuschaefer@gmx.=
net/
> - Leave WDT clock running during after restart handler
> - Fix reset controller initialization
> - Dropped patch 2/7 (clocksource: timer-npcm7xx: Enable timer 1 clock bef=
ore use),
>   as it was applied by Daniel Lezcano
>
> v3:
> - https://lore.kernel.org/lkml/20220508194333.2170161-1-j.neuschaefer@gmx=
.net/
> - Changed "refclk" string to "ref"
> - Fixed some dead code in the driver
> - Added clk_prepare_enable call to the watchdog restart handler
> - Added a few review tags
>
> v2:
> - https://lore.kernel.org/lkml/20220429172030.398011-1-j.neuschaefer@gmx.=
net/
> - various small improvements
>
> v1:
> - https://lore.kernel.org/lkml/20220422183012.444674-1-j.neuschaefer@gmx.=
net/
>
> Jonathan Neusch=C3=A4fer (6):
>   dt-bindings: timer: nuvoton,npcm7xx-timer: Allow specifying all clocks
>   clocksource: timer-npcm7xx: Enable timer 1 clock before use
>   dt-bindings: clock: Add Nuvoton WPCM450 clock/reset controller
>   ARM: dts: wpcm450: Add clock controller node
>   clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver
>   [NOT FOR MERGE] ARM: dts: wpcm450: Switch clocks to clock controller
>
>  .../bindings/clock/nuvoton,wpcm450-clk.yaml   |  66 +++
>  .../bindings/timer/nuvoton,npcm7xx-timer.yaml |   8 +-
>  arch/arm/boot/dts/nuvoton-wpcm450.dtsi        |  29 +-
>  drivers/clk/Makefile                          |   1 +
>  drivers/clk/clk-wpcm450.c                     | 375 ++++++++++++++++++
>  drivers/clocksource/timer-npcm7xx.c           |  10 +
>  drivers/reset/Kconfig                         |   2 +-
>  .../dt-bindings/clock/nuvoton,wpcm450-clk.h   |  67 ++++
>  8 files changed, 549 insertions(+), 9 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,wpcm4=
50-clk.yaml
>  create mode 100644 drivers/clk/clk-wpcm450.c
>  create mode 100644 include/dt-bindings/clock/nuvoton,wpcm450-clk.h
>
> --
> 2.35.1
>