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[2620:137:e000::1:20]) by mx.google.com with ESMTP id di14-20020a170906730e00b007ae1052555dsi11306389ejc.436.2022.11.21.18.29.40; Mon, 21 Nov 2022 18:30:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232342AbiKVBqK (ORCPT + 91 others); Mon, 21 Nov 2022 20:46:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230468AbiKVBqI (ORCPT ); Mon, 21 Nov 2022 20:46:08 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB0C7C606D; Mon, 21 Nov 2022 17:46:03 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 6F8A524DBE9; Tue, 22 Nov 2022 09:46:02 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 22 Nov 2022 09:46:02 +0800 Received: from [192.168.125.106] (113.72.144.23) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 22 Nov 2022 09:46:03 +0800 Message-ID: <126b0517-2f10-4a31-e76d-8afb1aff6275@starfivetech.com> Date: Tue, 22 Nov 2022 09:45:47 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Content-Language: en-US To: Emil Renner Berthing CC: "linux-riscv@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-clk@vger.kernel.org" , Conor Dooley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , "Michael Turquette" , Philipp Zabel , "linux-kernel@vger.kernel.org" References: <20221118010627.70576-1-hal.feng@starfivetech.com> <20221118010627.70576-10-hal.feng@starfivetech.com> From: Hal Feng In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [113.72.144.23] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,NICE_REPLY_A, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 19 Nov 2022 00:50:41 +0800, Emil Renner Berthing wrote: > On Fri, 18 Nov 2022 at 02:06, Hal Feng wrote: > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > > new file mode 100644 > > index 000000000000..a8cafbc0afe2 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > > @@ -0,0 +1,80 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: StarFive JH7110 System Clock and Reset Generator > > + > > +maintainers: > > + - Emil Renner Berthing > > + > > +properties: > > + compatible: > > + const: starfive,jh7110-syscrg > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: Main Oscillator (24 MHz) > > + - description: RMII reference clock > > + - description: RGMII RX clock > > + - description: I2S TX bit clock > > + - description: I2S TX left/right clock > > + - description: I2S RX bit clock > > + - description: I2S RX left/right clock > > + - description: TDM > > + - description: mclk > > Maybe you could ask your colleagues for a better description of these clocks. OK, I will improve the description. Best regards, Hal