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Received: from DU2PR04MB8536.eurprd04.prod.outlook.com (2603:10a6:10:2d7::10) by VI1PR04MB7182.eurprd04.prod.outlook.com (2603:10a6:800:121::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.13; Tue, 22 Nov 2022 16:22:50 +0000 Received: from DU2PR04MB8536.eurprd04.prod.outlook.com ([fe80::9584:94ee:73c6:bed4]) by DU2PR04MB8536.eurprd04.prod.outlook.com ([fe80::9584:94ee:73c6:bed4%5]) with mapi id 15.20.5834.015; Tue, 22 Nov 2022 16:22:49 +0000 Message-ID: <84af9a9e-5d82-7420-e72c-4d984135f2d6@theobroma-systems.com> Date: Tue, 22 Nov 2022 17:22:45 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH RFC v2 5/7] arm64: dts: imx: fix touchscreen reset GPIO polarity Content-Language: en-US To: Robin Murphy , David Jander , Fabio Estevam Cc: Quentin Schulz , "Angus Ainslie (Purism)" , Shawn Guo , Krzysztof Kozlowski , Heiko Stuebner , Samuel Holland , Bjorn Andersson , Konrad Dybcio , Jernej Skrabec , Bastien Nocera , Chen-Yu Tsai , Sascha Hauer , Pengutronix Kernel Team , Hans de Goede , Andy Gross , Rob Herring , NXP Linux Team , Dmitry Torokhov , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org References: <20221103-upstream-goodix-reset-v2-0-2c38fb03a300@theobroma-systems.com> <20221103-upstream-goodix-reset-v2-5-2c38fb03a300@theobroma-systems.com> <20221122081851.6cb762d8@erd992> <907b9321-14dc-dc99-80fc-e1a20ee33a1e@theobroma-systems.com> <916a6953-d9b4-c257-c08b-f5277ead71af@arm.com> From: Quentin Schulz In-Reply-To: <916a6953-d9b4-c257-c08b-f5277ead71af@arm.com> Content-Type: text/plain; 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This was apparently necessary ;-) >>> >>>> On Mon, Nov 21, 2022 at 3:12 PM Quentin Schulz >>>> wrote: >>>>> >>>>> From: Quentin Schulz >>>>> >>>>> The reset line is active low for the Goodix touchscreen controller so >>>>> let's fix the polarity in the Device Tree node. >>>>> >>>>> Signed-off-by: Quentin Schulz >>>>> --- >>>>>   arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts         | 2 +- >>>>>   arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 2 +- >>>>>   2 files changed, 2 insertions(+), 2 deletions(-) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts >>>>> b/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts >>>>> index 9fbbbb556c0b3..df7e5ae9698e1 100644 >>>>> --- a/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts >>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts >>>>> @@ -107,7 +107,7 @@ touchscreeen@5d { >>>>>                  interrupt-parent = <&gpio1>; >>>>>                  interrupts = <8 IRQ_TYPE_NONE>; >>>>>                  irq-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; >>>>> -               reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; >>>>> +               reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; >>> >>> NACK! >>> >>> The PRT8MM has an inverter in the reset line. The reason for that is >>> that the >>> reset line needs to be inactive when the driving side is unpowered. >>> The DT was correct, this change will break it. >>> >> >> The DT was correct. The implementation in the driver is changed (the >> polarity is swapped) in this patch series, therefore the DT isn't >> correct anymore, hence this patch. > > I'm not sure it's quite that simple... FWIW I'm using an add-on LCD > module with a GT9271[1] (and I won't be the only one - Raspberry Pi and > other SBC users using DT overlays or custom-built DTBs are a whole other > can of worms here), where GPIO_ACTIVE_LOW is correctly specified per the > schematics, thus "wrong" for the current driver behaviour, yet it *is* > working OK as-is. I guess that's because /RSTB ends up driven low for > long enough between the current "deassertion" by > gpiod_direction_output(1) and gpiod_direction_input() allowing the > external pull-up to take it high again. > Correct, that seems like it is the case for "current-wrong" GPIO level, provided you have a pull-up on the RESET line (as recommended in the datasheet). c.f. https://github.com/hadess/gt9xx/blob/master/specifications/GT9271%20Datasheet.pdf with the current driver, what I assume we should get is: ___________________ INT _______| |___________ ____________ __________________ RST |_________| ^ L__ pull-up on RST so high by default ^ L___ gpiod_direction_output(0) (deassert GPIO active-low, so high) ^ L____ goodix_irq_direction_output ^ L___ gpiod_direction_output(1) (assert GPIO active-low, so low) ^ L____ gpiod_direction_input() (floating, pull-up on RST so high) This works because of the pull-up on RST and that what matters is that the INT lane is configured 100µs before a rising edge on RST line (for at least 5ms). However, the init sequence is not properly followed and might get broken in the future since it is not something that we explicitly support. With the proposed patch: ___________________ INT _______| |___________ ____ __________________ RST |_______| ^ L__ pull-up on RST so high by default ^ L___ gpiod_direction_output(1) (assert GPIO active-low, so low) ^ L____ goodix_irq_direction_output ^ L___ gpiod_direction_output(1) (deassert GPIO active-low, so high) ^ L____ gpiod_direction_input() (floating, pull-up on RST so high) This should work too and does not rely on some side effects/timings and should be future-proof. As for OOT DTB/DTBO, nothing I can do unfortunately, that is correct. The fact that we have both "interpretations" of the RESET GPIO level in Linux is worrying, albeit with OOT DTBs. A driver or subsystem rework might break boards in which case people should update their DTB as suggested here or we'll decide to support both interpretations, which ain't great either. Cheers, Quentin