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From:   Thomas Gleixner <tglx@linutronix.de>
To:     "Tian, Kevin" <kevin.tian@intel.com>,
        LKML <linux-kernel@vger.kernel.org>
Cc:     "x86@kernel.org" <x86@kernel.org>, Joerg Roedel <joro@8bytes.org>,
        Will Deacon <will@kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Marc Zyngier <maz@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jason Gunthorpe <jgg@mellanox.com>,
        "Jiang, Dave" <dave.jiang@intel.com>,
        Alex Williamson <alex.williamson@redhat.com>,
        "Williams, Dan J" <dan.j.williams@intel.com>,
        Logan Gunthorpe <logang@deltatee.com>,
        "Raj, Ashok" <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
        Allen Hubbe <allenbh@gmail.com>
Subject: RE: [patch V2 31/33] iommu/vt-d: Enable PCI/IMS
In-Reply-To: <BN9PR11MB527650A018BE7BF422BDA2F58C0F9@BN9PR11MB5276.namprd11.prod.outlook.com>
References: <20221121083657.157152924@linutronix.de>
 <20221121091328.184455059@linutronix.de>
 <BN9PR11MB527650A018BE7BF422BDA2F58C0F9@BN9PR11MB5276.namprd11.prod.outlook.com>
Date:   Thu, 24 Nov 2022 10:37:53 +0100
Message-ID: <87ilj4d766.ffs@tglx>
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On Thu, Nov 24 2022 at 03:17, Kevin Tian wrote:
>>  static const struct msi_parent_ops dmar_msi_parent_ops = {
>> -	.supported_flags	= X86_VECTOR_MSI_FLAGS_SUPPORTED |
>> MSI_FLAG_MULTI_PCI_MSI,
>> +	.supported_flags	= X86_VECTOR_MSI_FLAGS_SUPPORTED |
>> +				  MSI_FLAG_MULTI_PCI_MSI |
>> +				  MSI_FLAG_PCI_IMS,
>>  	.prefix			= "IR-",
>>  	.init_dev_msi_info	= msi_parent_init_dev_msi_info,
>>  };
>
> vIR is already available on vIOMMU today [1].
>
> Fortunately both intel/amd IOMMU has a way to detect whether it's a vIOMMU.
>
> For intel it's cap_caching_mode().
>
> For AMD it's amd_iommu_np_cache.
>
> Then MSI_FLAG_PCI_IMS should be set only on physical IOMMU.

Ok. Let me fix that then.

But that made me read back some more.

Jason said, that the envisioned Mellanox use case does not depend on the
IOMMU because the card itself has one which takes care of the
protections.

How are we going to resolve that dilemma?

Thanks,

        tglx