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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q185-20020a632ac2000000b0046b19725686si5284324pgq.775.2022.11.25.16.52.48; Fri, 25 Nov 2022 16:52:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Lfbfzuj2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230186AbiKZAZm (ORCPT + 86 others); Fri, 25 Nov 2022 19:25:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbiKZAZl (ORCPT ); Fri, 25 Nov 2022 19:25:41 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 197D759FFA; Fri, 25 Nov 2022 16:25:40 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C45E5B82C15; Sat, 26 Nov 2022 00:25:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85FE1C4314A; Sat, 26 Nov 2022 00:25:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669422337; bh=v1EAEdq/9XMPq4VdR6VbfxT4QOV2UU4TS9MCVch7vtg=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=Lfbfzuj2/Myn5D5nFNHvzorwfWA+auD8gXXE/558BrcgffXs2ZFVxJGedPJ96UUFT JgZ3F6d6BU7nhp+h3MXml9ovKBRGqIrj7NH/tQ5PSRbQl/9CSXuhdltCG/Ux01doU2 KnIR0pfVoGvizULCu8yD3q64vikWPZZwt/DpN18KJBGbqFhUx/EV/3tUJvvq0v5y1U 2gEJU/CYreqSEiS9JZ4GhPU9IIC23IUl7txY7OODc15h7I/3xT5u0wGVW+R1Css9L4 bpzfQXbCmZ1CcCz6jBn/dW9DudlT6JjXwNtrlNA1QexTUOZTJlrGYWcRjAxlWGEwxW QnzuxGlOaK5bg== Received: by mail-ej1-f53.google.com with SMTP id ud5so13454092ejc.4; Fri, 25 Nov 2022 16:25:37 -0800 (PST) X-Gm-Message-State: ANoB5pnQ38nqC6caIgQYX7RbwKHzJAOSjSrKVMUtVo3i70ha80XI4StP KAqcFqOFAhekeoHiuGRaOdXPpwLgeMltuHMeqC0= X-Received: by 2002:a17:906:19d7:b0:7b2:b782:e1df with SMTP id h23-20020a17090619d700b007b2b782e1dfmr30032927ejd.308.1669422335764; Fri, 25 Nov 2022 16:25:35 -0800 (PST) MIME-Version: 1.0 References: <20221125234656.47306-1-samuel@sholland.org> <20221125234656.47306-10-samuel@sholland.org> In-Reply-To: <20221125234656.47306-10-samuel@sholland.org> From: Guo Ren Date: Sat, 26 Nov 2022 08:25:24 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 09/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree To: Samuel Holland Cc: Chen-Yu Tsai , Jernej Skrabec , linux-sunxi@lists.linux.dev, Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , Heiko Stuebner , Jisheng Zhang , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andre Przywara , Albert Ou , Anup Patel , Atish Patra , Christian Hewitt , Conor Dooley , Heinrich Schuchardt , Linus Walleij , Paul Walmsley , Stanislav Jakubek Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed-by: Guo Ren On Sat, Nov 26, 2022 at 7:47 AM Samuel Holland wrote: > > The 100ask Dongshan Nezha STU is a system-on-module that can be used > standalone or with a carrier board. The SoM provides gigabit Ethernet, > HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip. > > The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1" > headers, but contains no digital circuitry, so it does not have its own > devicetree. > > Signed-off-by: Samuel Holland > --- > > (no changes since v1) > > arch/riscv/boot/dts/allwinner/Makefile | 1 + > .../sun20i-d1-dongshan-nezha-stu.dts | 118 ++++++++++++++++++ > 2 files changed, 119 insertions(+) > create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts > > diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/allwinner/Makefile > index 2ed586fafaea..87f70b1af6b4 100644 > --- a/arch/riscv/boot/dts/allwinner/Makefile > +++ b/arch/riscv/boot/dts/allwinner/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-dongshan-nezha-stu.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts > new file mode 100644 > index 000000000000..c549a1c5fbf0 > --- /dev/null > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts > @@ -0,0 +1,118 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +// Copyright (C) 2022 Samuel Holland > + > +#include > +#include > + > +/dts-v1/; > + > +#include "sun20i-d1.dtsi" > +#include "sun20i-common-regulators.dtsi" > + > +/ { > + model = "Dongshan Nezha STU"; > + compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1"; > + > + aliases { > + ethernet0 = &emac; > + mmc0 = &mmc0; > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-0 { > + color = ; > + function = LED_FUNCTION_STATUS; > + gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */ > + }; > + }; > + > + reg_usbvbus: usbvbus { > + compatible = "regulator-fixed"; > + regulator-name = "usbvbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ > + enable-active-high; > + vin-supply = <®_vcc>; > + }; > + > + /* > + * This regulator is PWM-controlled, but the PWM controller is not > + * yet supported, so fix the regulator to its default voltage. > + */ > + reg_vdd_cpu: vdd-cpu { > + compatible = "regulator-fixed"; > + regulator-name = "vdd-cpu"; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + vin-supply = <®_vcc>; > + }; > +}; > + > +&cpu0 { > + cpu-supply = <®_vdd_cpu>; > +}; > + > +&dcxo { > + clock-frequency = <24000000>; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&emac { > + pinctrl-0 = <&rgmii_pe_pins>; > + pinctrl-names = "default"; > + phy-handle = <&ext_rgmii_phy>; > + phy-mode = "rgmii-id"; > + phy-supply = <®_vcc_3v3>; > + status = "okay"; > +}; > + > +&mdio { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > +&mmc0 { > + broken-cd; > + bus-width = <4>; > + disable-wp; > + vmmc-supply = <®_vcc_3v3>; > + vqmmc-supply = <®_vcc_3v3>; > + pinctrl-0 = <&mmc0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > + > +&uart0 { > + pinctrl-0 = <&uart0_pb8_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&usb_otg { > + dr_mode = "otg"; > + status = "okay"; > +}; > + > +&usbphy { > + usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ > + usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ > + usb0_vbus-supply = <®_usbvbus>; > + status = "okay"; > +}; > -- > 2.37.4 > -- Best Regards Guo Ren