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From:   Samuel Holland <samuel@sholland.org>
To:     Marc Zyngier <maz@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Palmer Dabbelt <palmer@dabbelt.com>
Cc:     linux-riscv@lists.infradead.org,
        Samuel Holland <samuel@sholland.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        linux-kernel@vger.kernel.org
Subject: [PATCH 2/3] genirq: Add support for oneshot-safe threaded EOIs
Date:   Sat, 26 Nov 2022 17:41:33 -0600
Message-Id: <20221126234134.32660-3-samuel@sholland.org>
In-Reply-To: <20221126234134.32660-1-samuel@sholland.org>
References: <20221126234134.32660-1-samuel@sholland.org>
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For irqchips such as the SiFive PLIC with a claim/EOI flow, each IRQ is
implicitly masked during the claim operation and unmasked after the EOI.
By delaying the EOI until after the thread runs, we can support threaded
IRQs without any explicit mask/unmask operations.

irqchips can declare this capability using the combination of flags
IRQCHIP_ONESHOT_SAFE | IRQCHIP_EOI_THREADED.

In this case, we still set IRQF_ONESHOT and thus action->thread_mask, so
we know based on desc->threads_oneshot when to send the EOI. However, we
do not set IRQS_ONESHOT, so we skip the actual mask/unmask operations.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 kernel/irq/chip.c   |  4 +++-
 kernel/irq/manage.c | 15 ++++++++++-----
 2 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 672bad021a1f..7a4b3fa85da0 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -446,7 +446,9 @@ void unmask_threaded_irq(struct irq_desc *desc)
 	if (chip->flags & IRQCHIP_EOI_THREADED)
 		chip->irq_eoi(&desc->irq_data);
 
-	unmask_irq(desc);
+	if (!irqd_irq_disabled(&desc->irq_data) &&
+	    (desc->istate & IRQS_ONESHOT))
+		unmask_irq(desc);
 }
 
 /*
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 40fe7806cc8c..b9edb66428cd 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1074,9 +1074,10 @@ static int irq_wait_for_interrupt(struct irqaction *action)
 static void irq_finalize_oneshot(struct irq_desc *desc,
 				 struct irqaction *action)
 {
-	if (!(desc->istate & IRQS_ONESHOT) ||
+	if (!(action->flags & IRQF_ONESHOT) ||
 	    action->handler == irq_forced_secondary_handler)
 		return;
+
 again:
 	chip_bus_lock(desc);
 	raw_spin_lock_irq(&desc->lock);
@@ -1112,8 +1113,7 @@ static void irq_finalize_oneshot(struct irq_desc *desc,
 
 	desc->threads_oneshot &= ~action->thread_mask;
 
-	if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
-	    irqd_irq_masked(&desc->irq_data))
+	if (!desc->threads_oneshot)
 		unmask_threaded_irq(desc);
 
 out_unlock:
@@ -1565,8 +1565,12 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
 	 * MSI based interrupts are per se one shot safe. Check the
 	 * chip flags, so we can avoid the unmask dance at the end of
 	 * the threaded handler for those.
+	 *
+	 * If IRQCHIP_EOI_THREADED is also set, we do an EOI dance
+	 * instead of a mask/unmask dance.
 	 */
-	if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
+	if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE &&
+	    !(desc->irq_data.chip->flags & IRQCHIP_EOI_THREADED))
 		new->flags &= ~IRQF_ONESHOT;
 
 	/*
@@ -1755,7 +1759,8 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
 		if (noirqdebug)
 			irq_settings_set_no_debug(desc);
 
-		if (new->flags & IRQF_ONESHOT)
+		if (new->flags & IRQF_ONESHOT &&
+		    !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE))
 			desc->istate |= IRQS_ONESHOT;
 
 		/* Exclude IRQ from balancing if requested */
-- 
2.37.4