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[2620:137:e000::1:20]) by mx.google.com with ESMTP id m17-20020a056402511100b004690097d852si10640692edd.252.2022.11.28.02.06.31; Mon, 28 Nov 2022 02:06:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=RoqS52Rl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229908AbiK1Jw1 (ORCPT + 84 others); Mon, 28 Nov 2022 04:52:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229799AbiK1Jw0 (ORCPT ); Mon, 28 Nov 2022 04:52:26 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0840E192AD for ; Mon, 28 Nov 2022 01:52:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id ABD2EB80CB4 for ; Mon, 28 Nov 2022 09:52:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 765CBC433D6; Mon, 28 Nov 2022 09:52:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669629141; bh=qd6xOdsXyMIm7VieH+jeOpMysoYfiXB1UKsSPIoaNMI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=RoqS52RlZ2QAzWj+P+jGtB5i6Ee98B/IIHgsxWLvYrFWeNwyOZ1HIISOLdI5oA9Ij gKXc/5dpqcheCMiEDnMCz3nZ3u17/aUe2GHBe65KS2XDekuuIIY70JRvKFZRfZ7uLb X6j5svafVjHwFB5PEP4oJjpNuDEhGNEeQpvCFowhLAhuDHuVzbvBQHywLvtpQvuHuB pzOG+lK6BM338pNMpmRDDdvz8wm0a/8gUWSZWDbC05SRZdD8TNiOztimS1VIxgF1ju LqgMnkAOR05h5CN/tGGHHmlBZ+Nu01XKkyf6CNJiGLyuo5L7pl2gAolxSMxp2HrEwE NT9BB/DRZA6+g== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1ozaoF-008yff-5a; Mon, 28 Nov 2022 09:52:19 +0000 Date: Mon, 28 Nov 2022 09:52:18 +0000 Message-ID: <86lenvmmnh.wl-maz@kernel.org> From: Marc Zyngier To: Samuel Holland Cc: Tiezhu Yang , Thomas Gleixner , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] irqchip: LoongArch: Select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP In-Reply-To: References: <1666841949-5244-1-git-send-email-yangtiezhu@loongson.cn> <87v8n1ubbj.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: samuel@sholland.org, yangtiezhu@loongson.cn, tglx@linutronix.de, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 26 Nov 2022 23:49:10 +0000, Samuel Holland wrote: > > On 11/26/22 06:53, Marc Zyngier wrote: > > On Thu, 27 Oct 2022 04:39:09 +0100, > > Tiezhu Yang wrote: > >> > >> An IRQ's effective affinity can only be different from its configured > >> affinity if there are multiple CPUs. Make it clear that this option is > >> only meaningful when SMP is enabled. > >> > >> Signed-off-by: Tiezhu Yang > >> --- > >> > >> v2: rebased on 6.1-rc2 > >> > >> drivers/irqchip/Kconfig | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > >> index 7ef9f5e..8461915 100644 > >> --- a/drivers/irqchip/Kconfig > >> +++ b/drivers/irqchip/Kconfig > >> @@ -575,7 +575,7 @@ config IRQ_LOONGARCH_CPU > >> bool > >> select GENERIC_IRQ_CHIP > >> select IRQ_DOMAIN > >> - select GENERIC_IRQ_EFFECTIVE_AFF_MASK > >> + select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP > >> select LOONGSON_LIOINTC > >> select LOONGSON_EIOINTC > >> select LOONGSON_PCH_PIC > > > > We already have this: > > > > # Supports effective affinity mask > > config GENERIC_IRQ_EFFECTIVE_AFF_MASK > > depends on SMP > > bool > > > > Do we really need to express this for every interrupt controller? > > Unfortunately yes, because "select" does not respect dependencies. So > the "depends on SMP" line does not enforce anything; it only serves to > provide a warning at configure time that the build will break. I understand that. My question was more "how can we avoid doing that for each and every irqchip". So far, the only things I can think of are either an intermediate config symbol that performs the "if SMP" by itself, or spraying checks for CONFIG_SMP all over the shop. None of which are appealing. M. -- Without deviation from the norm, progress is not possible.