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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id u5-20020a656705000000b004767bc37e03sm7180615pgf.39.2022.11.28.11.05.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Nov 2022 11:05:47 -0800 (PST) Date: Mon, 28 Nov 2022 19:05:43 +0000 From: Sean Christopherson To: Peter Zijlstra Cc: "Li, Xin3" , Paolo Bonzini , "linux-kernel@vger.kernel.org" , "x86@kernel.org" , "kvm@vger.kernel.org" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "hpa@zytor.com" , "Tian, Kevin" Subject: Re: [RESEND PATCH 5/6] KVM: x86/VMX: add kvm_vmx_reinject_nmi_irq() for NMI/IRQ reinjection Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 24, 2022, Peter Zijlstra wrote: > On Wed, Nov 23, 2022 at 08:42:51PM +0000, Sean Christopherson wrote: > > arch/x86/kvm/kvm_cache_regs.h | 16 +++++------ > > arch/x86/kvm/vmx/vmenter.S | 4 +-- > > arch/x86/kvm/vmx/vmx.c | 51 ++++++++++++++++++----------------- > > arch/x86/kvm/vmx/vmx.h | 2 +- > > arch/x86/kvm/x86.h | 6 ++--- > > 5 files changed, 41 insertions(+), 38 deletions(-) > > > > diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h > > index c09174f73a34..af9bd0374915 100644 > > --- a/arch/x86/kvm/kvm_cache_regs.h > > +++ b/arch/x86/kvm/kvm_cache_regs.h > > @@ -50,26 +50,26 @@ BUILD_KVM_GPR_ACCESSORS(r15, R15) > > * 1 0 register in vcpu->arch > > * 1 1 register in vcpu->arch, needs to be stored back > > */ > > -static inline bool kvm_register_is_available(struct kvm_vcpu *vcpu, > > - enum kvm_reg reg) > > +static __always_inline bool kvm_register_is_available(struct kvm_vcpu *vcpu, > > + enum kvm_reg reg) > > { > > return test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); > > } > > > > -static inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu, > > - enum kvm_reg reg) > > +static __always_inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu, > > + enum kvm_reg reg) > > { > > return test_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); > > } > > > > -static inline void kvm_register_mark_available(struct kvm_vcpu *vcpu, > > - enum kvm_reg reg) > > +static __always_inline void kvm_register_mark_available(struct kvm_vcpu *vcpu, > > + enum kvm_reg reg) > > { > > __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); > > } > > > > -static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu, > > - enum kvm_reg reg) > > +static __always_inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu, > > + enum kvm_reg reg) > > { > > __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); > > __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); > > You'll have to consider include/asm-generic/bitops/instrumented-non-atomic.h > and friend, and the above should probably switch to using: > > arch_test_bit(), arch___set_bit() resp. > > to avoid the explicit instrumentation. Well that's just mean. I'll figure out a solution, thanks for the heads up!