Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp15599188rwb; Mon, 28 Nov 2022 13:41:46 -0800 (PST) X-Google-Smtp-Source: AA0mqf58JGwhKM+j7F3ZM1LELDTtJtw1sMWCCDFAIrhRiWPsulHZMBTrSMevgChNnMH21fpDO2g5 X-Received: by 2002:a17:906:2e83:b0:78d:b3f0:b5c0 with SMTP id o3-20020a1709062e8300b0078db3f0b5c0mr46932329eji.141.1669671706737; Mon, 28 Nov 2022 13:41:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669671706; cv=none; d=google.com; s=arc-20160816; b=a8J/qnokqx4GaoqqlmIpAE/9vhfeIkDDwZfFk1cFvjCd2A3ZuI/okNfuBfz0AItDSb z2plqUcCh5rFqFLDcRoS1T33HDX69lAxDq71Z0Je7O4ZdPGig9l/w0APueENOSFq76UQ itpkoUF2GFb8j4y+uKyVjaEbsX4toYhowpymDJd4v0ivfoc442w/ApZk4YS03LUv7ftS 8SeAMj5L654bcV7vb5YFLHjt3EI3gf72av+AW9PcEzjKaWo0RMxkgynKn46NWf/lWQrT cMI132Ruir7NsIGxX+nrF445oFriIM8HolTAqCwiFeO7ayIHcCamMRUsy2KgwzlfETGp 2hHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=C0LXIJI7Jwrp9irbYPVuZ/zATeld30E9BF4kDpuOTMY=; b=FI07dx6QYL8NItF7trVo1BLOQbnQrLpA5Y5bVMwrgFWtrWB42woQDUpbVXUvo2i6Vh 2wpF84hfmQYBE61nORqyRpNRYeYBOeCd5VYl/k7+eiAx9huumAO5n/p1TssgoDdfhSzd vZ6izGsQWh2s0BiNtRWtNXjGTrgFgWiXepmBCq1lsgXG2oXrlBF9RGJmN2mOTFyufHvd IEnhhSZGI5kyMbn7MGPeHprZ/Z3Sj2tMfNVigtmmLxAXuYlwnLDVhqJhxN4SNqRhWfkr QhMBofxBkAzNLaUwseNsU8XXA6yxxa3BrhIRgQOrt+z+qBVL7kpbFMx/URjh7bdBEng9 gdKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@atishpatra.org header.s=google header.b=sychVsIu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dd20-20020a1709069b9400b007ae8b1704d0si11420892ejc.68.2022.11.28.13.41.26; Mon, 28 Nov 2022 13:41:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@atishpatra.org header.s=google header.b=sychVsIu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234272AbiK1VB2 (ORCPT + 84 others); Mon, 28 Nov 2022 16:01:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233731AbiK1VBK (ORCPT ); Mon, 28 Nov 2022 16:01:10 -0500 Received: from mail-oa1-x2a.google.com (mail-oa1-x2a.google.com [IPv6:2001:4860:4864:20::2a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 746AB26128 for ; Mon, 28 Nov 2022 13:01:02 -0800 (PST) Received: by mail-oa1-x2a.google.com with SMTP id 586e51a60fabf-142faa7a207so14548861fac.13 for ; Mon, 28 Nov 2022 13:01:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=C0LXIJI7Jwrp9irbYPVuZ/zATeld30E9BF4kDpuOTMY=; b=sychVsIuyCs1J6sBN39fZaWelxUucVukYj9mRGoF1TcGNnYpdd/Yeb/uvh6XlBjUWD +XvcyKtqpdr9+WPiouT7bCvHKPAfcsqUB8ouoz8ATXbrAmLyWmW+IATIRgfOCUamzen4 A3AERg4lfY92/gZfNXiNubTPsFjR4uDuhDyZs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=C0LXIJI7Jwrp9irbYPVuZ/zATeld30E9BF4kDpuOTMY=; b=xuJbIPGKZXtXYq4ZBY6w9Pvzmd5Y0glq3Uvxy6wC3qfrcJScJhlndGwC4TWVfyRDTI nZ3GNWQAZ/IqtfAEfpF0Xti51yF7EYf35KuntuPG7eXahG+cUHn18QEX5NNRQatr0ym6 eQoT2KV6akzvx/Ho1D/F8dZF8JPzpudxjR6Fd2geoeThHSevt6+F5aBOxNnmHoroykWl luB1uDTehUkI7lxtQPLSPm20FaTV3Ud+Z8VY+NnUGRUj8yv4HgOHxtEvyp4Oje+1cM5X a7PHoW/SggWprkuodYsHkoMSpC5+gxkjj7e5TOAesfV+HKinTrzWprivt2963rYda8Bm qJJA== X-Gm-Message-State: ANoB5pkxi7qdT40JDGiJGQByfO+R1YE1CKGNQ4K8KE4gMpWPA8fSOqGU SrCYZXVKyudzeqQ5P26R3Pnwm8WCYEsNCPqrVt2Z X-Received: by 2002:a05:6870:c18a:b0:142:870e:bd06 with SMTP id h10-20020a056870c18a00b00142870ebd06mr26790617oad.181.1669669261652; Mon, 28 Nov 2022 13:01:01 -0800 (PST) MIME-Version: 1.0 References: <20220718170205.2972215-1-atishp@rivosinc.com> <20220718170205.2972215-7-atishp@rivosinc.com> <20221101142631.du54p4kyhlgf54cr@kamzik> <20221123135842.uyw46kbybgb7unm2@kamzik> <20221124105051.hbsavj3bgf4mvlzb@kamzik> In-Reply-To: From: Atish Patra Date: Mon, 28 Nov 2022 13:00:50 -0800 Message-ID: Subject: Re: [RFC 6/9] RISC-V: KVM: Add SBI PMU extension support To: Anup Patel Cc: Andrew Jones , Atish Patra , linux-kernel@vger.kernel.org, Albert Ou , Anup Patel , Guo Ren , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paul Walmsley , Will Deacon Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 24, 2022 at 4:59 AM Anup Patel wrote: > > On Thu, Nov 24, 2022 at 4:21 PM Andrew Jones wrote: > > > > On Thu, Nov 24, 2022 at 02:18:26AM -0800, Atish Patra wrote: > > > On Wed, Nov 23, 2022 at 5:58 AM Andrew Jones wrote: > > > > > > > > On Tue, Nov 22, 2022 at 03:08:34PM -0800, Atish Patra wrote: > > ... > > > > > Currently, ARM64 enables pmu from user space using device control APIs > > > > > on vcpu fd. > > > > > Are you suggesting we should do something like that ? > > > > > > > > Yes. Although choosing which KVM API should be used could probably be > > > > thought-out again. x86 uses VM ioctls. > > > > > > > > > > How does it handle hetergenous systems in per VM ioctls ? > > > > I don't think it does, but neither does arm64. Afaik, the only way to run > > KVM VMs on heterogeneous systems is to pin the VM to one set of the CPUs, > > i.e. make sure the system it runs on is homogeneous. > > > > I agree we shouldn't paint ourselves into a homogeneous-only corner for > > riscv, though, so if it's possible to use VCPU APIs, then I guess we > > should. Although, one thing to keep in mind is that if the same ioctl > > needs to be run on each VCPU, then, when we start building VMs with > > hundreds of VCPUs, we'll see slow VM starts. > > > > > > > > > > > > > > > If PMU needs to have device control APIs (either via vcpu fd or its > > > > > own), we can retrieve > > > > > the hpmcounter width and count from there as well. > > > > > > > > Right. We need to decide how the VM/VCPU + PMU user interface should look. > > > > A separate PMU device, like arm64 has, sounds good, but the ioctl > > > > sequences for initialization may get more tricky. > > > > > > > > > > Do we really need a per VM interface ? I was thinking we can just > > > continue to use > > > one reg interface for PMU as well. We probably need two of them. > > > > > > 1. To enable/disable SBI extension > > > -- The probe function will depend on this > > > 2. PMU specific get/set > > > -- Number of hpmcounters > > > -- hpmcounter width > > > -- enable PMU > > > > ONE_REG is good for registers and virtual registers, which means the > > number of hpmcounters and the hpmcounter width are probably good > > candidates, but I'm not sure we should use it for enable/init types of > > purposes. > > We are already using ONE_REG interface to enable/disable > ISA extensions so we should follow the same pattern and have > ONE_REG interface to enable/disable SBI extensions as well. > Thinking about it more, it may end up in vcpus with heterogeneous capabilities (different SBI extension). Most likely, it will be a bug and incorrect configuration from VMM but it's a possibility. For example: There will be two different scenarios for PMU extension 1. Boot vcpu disabled PMU extension - probably okay as guest queries the PMU extension on boot cpu only. The PMU extension won't be available for any other vcpu. 2. Boot vcpu has PMU extension enabled but others have it disabled. The run time SBI PMU calls will fail with EOPNOTSUPP and the user gets confused. There will be similar cases for HSM extension as well. As the entire extension won't be available to the guest if the SBI extension is disabled for the boot cpu only. There is also a slow VM start issue Andrew pointed about earlier. This makes me think if a VM ioctl to disable/enable the SBI extension for all vcpus makes more sense in this case. > Regards, > Anup -- Regards, Atish