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From:   Chen-Yu Tsai <wenst@chromium.org>
To:     sboyd@kernel.org, angelogioacchino.delregno@collabora.com
Cc:     mturquette@baylibre.com, yangyingliang@huawei.com,
        jose.exposito89@gmail.com, matthias.bgg@gmail.com,
        linux-clk@vger.kernel.org, rex-bc.chen@mediatek.com,
        chun-jie.chen@mediatek.com, msp@baylibre.com,
        nfraprado@collabora.com, linux-arm-kernel@lists.infradead.org,
        miles.chen@mediatek.com, linux-mediatek@lists.infradead.org,
        linux-kernel@vger.kernel.org
In-Reply-To: <20221024102307.33722-1-angelogioacchino.delregno@collabora.com>
References: <20221024102307.33722-1-angelogioacchino.delregno@collabora.com>
Subject: Re: [PATCH 00/10] MTK: Undesired set_rate on main PLLs and GPU DVFS
Message-Id: <166970543840.607733.16874108898291986445.b4-ty@chromium.org>
Date:   Tue, 29 Nov 2022 15:03:58 +0800
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On Mon, 24 Oct 2022 12:22:57 +0200, AngeloGioacchino Del Regno wrote:
> There's no reason to declare CLK_SET_RATE_PARENT on main system PLL
> dividers, as any rate change on those (mainpll, syspll, univpll) will
> change clock rates on critical system peripherals and busses.
> 
> This change was performed only on SoCs that I could test... I'm sure
> that the same can (and should) be done on more MTK clock drivers for
> practically all MTK SoCs, but I don't feel confident in pushing things
> that I couldn't test, so that's done only for MT8173/83/86/92/95 and
> on MT6795.
> While at it, I've also added the much needed clock notifier treatment
> on MT8186 for GPU DVFS, like done on other clock drivers in the past.
> 
> [...]

Applied, thanks!

[01/10] clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks
        commit: 672c779e4cff5f4a103077e9b398f144c85db802
[02/10] clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factors
        commit: 295de9d0d063cc576c5c6322aeeda64d3579d9e5
[03/10] clk: mediatek: mt8183: Compress top_divs array entries
        commit: 23037ab63336a4a1d98645bf7ee76240ed20bc65
[04/10] clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors
        commit: c01d64ca5166fa88d27c7c4a2a294dd10d20f780
[05/10] clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factors
        commit: f757c9e951b89c40db41592a22785b5a25c58224
[06/10] clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factors
        commit: 0cf308ee3472019539582ee279b637beb34ad2ff
[07/10] clk: mediatek: mt8192: Drop flags for main/univpll fixed factors
        commit: b56603285f7e323591267bec9a9d6950e9bdb7cb
[08/10] clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factors
        commit: 327eeb6c240ab9293ab730789ea651fbc3fe6123
[09/10] clk: mediatek: mt8186-mfg: Propagate rate changes to parent
        commit: ecc639ddbe0d7bf1c66f6c69ee54ee005484d886
[10/10] clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier
        commit: 3256ea4f6582d2cb9b63ad96451957c217a52582

Best regards,
-- 
Chen-Yu Tsai <wenst@chromium.org>