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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q13-20020a170902dacd00b001844a8cf941si12586723plx.538.2022.11.29.01.13.45; Tue, 29 Nov 2022 01:13:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@broadcom.com header.s=google header.b=a6QOQ0fC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231317AbiK2In4 (ORCPT + 83 others); Tue, 29 Nov 2022 03:43:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231209AbiK2Ins (ORCPT ); Tue, 29 Nov 2022 03:43:48 -0500 Received: from mail-yb1-xb30.google.com (mail-yb1-xb30.google.com [IPv6:2607:f8b0:4864:20::b30]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6447421827 for ; Tue, 29 Nov 2022 00:43:47 -0800 (PST) Received: by mail-yb1-xb30.google.com with SMTP id y83so16539426yby.12 for ; Tue, 29 Nov 2022 00:43:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ElZQ2sI+pB8wyf6RA6jVzwDss5zLy1/9BbS9mMdAaLU=; b=a6QOQ0fCNGDwlivrQ1hmZ5n5GnHYuQmmQSlSljbJYsfO09OFvj0KHI8DIq8Xty8g2d UybEyGQh8bPwcsKpWNVJjpc4aPU6OwE+UPKNsvR30Xsnc5U0T/qgMy5nclWYTyUn8lrf JweAaw0/dpCgSs+hiLtamLz0YqcICHi2P64G8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ElZQ2sI+pB8wyf6RA6jVzwDss5zLy1/9BbS9mMdAaLU=; b=s0wNaw9fK4KSCkMTRF0k358E5mYRyqRwArvEWs2BFZlLGC73/2Q1MZP7PEKNT4pDCc HeQ1LOA9tfpkQZly7EFX8ZU0Btam/H7LBZpPzt9GlsguF2UHwTFd0kFT/4L2ecC9sZ2J s+WmpNLTwAGN+TIzKazrbUzqPS3yfcd0OwTPnTHVKC899pqAB4PYsPMwI3b9+Y0QEXZ6 nGHAsqYiS9kU/PgUOrhbsG/PjlYdKNn3VvJ/kIZyY0Uvo59PT8jVgzmwqBIoncgBzVk1 TgxHyIF7+vyUqQuL9vIa3EZBxB9qG9v2GnJMWLsGvtwWS54+rYHM+0YLXhCP5alD5h5R JimQ== X-Gm-Message-State: ANoB5pllA4kRB22/SdPLgxThxg6XIHJa5vNkNrZnjZgpAKX1/Jp7dd6M 9OfG5ZaZHp1s+HUQ2gWW6f1HJEFJtPXvJx+zcv2h+Q== X-Received: by 2002:a25:cf55:0:b0:6f6:f5d0:aa62 with SMTP id f82-20020a25cf55000000b006f6f5d0aa62mr8129607ybg.81.1669711426420; Tue, 29 Nov 2022 00:43:46 -0800 (PST) MIME-Version: 1.0 References: <20221128103227.23171-1-arun.ramadoss@microchip.com> <20221128103227.23171-5-arun.ramadoss@microchip.com> In-Reply-To: <20221128103227.23171-5-arun.ramadoss@microchip.com> From: Pavan Chebbi Date: Tue, 29 Nov 2022 14:13:35 +0530 Message-ID: Subject: Re: [Patch net-next v1 04/12] net: dsa: microchip: ptp: Manipulating absolute time using ptp hw clock To: Arun Ramadoss Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, woojung.huh@microchip.com, UNGLinuxDriver@microchip.com, andrew@lunn.ch, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, linux@armlinux.org.uk, Tristram.Ha@microchip.com, richardcochran@gmail.com, ceggers@arri.de Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="0000000000007950be05ee97fc5e" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --0000000000007950be05ee97fc5e Content-Type: text/plain; charset="UTF-8" On Mon, Nov 28, 2022 at 4:04 PM Arun Ramadoss wrote: > +/* Function is pointer to the do_aux_work in the ptp_clock capability */ > +static long ksz_ptp_do_aux_work(struct ptp_clock_info *ptp) > +{ > + struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp); > + struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data); > + struct timespec64 ts; > + > + mutex_lock(&ptp_data->lock); > + _ksz_ptp_gettime(dev, &ts); > + mutex_unlock(&ptp_data->lock); > + > + spin_lock_bh(&ptp_data->clock_lock); > + ptp_data->clock_time = ts; > + spin_unlock_bh(&ptp_data->clock_lock); If I understand this correctly, the software clock is updated with full 64b every 1s. However only 32b timestamp registers are read while processing packets and higher bits from this clock are used. How do you ensure these higher order bits are in sync with the higher order bits in the HW? IOW, what if lower 32b have wrapped around and you are required to stamp a packet but you still don't have aux worker updated. > + > + return HZ; /* reschedule in 1 second */ > +} > + > static int ksz_ptp_start_clock(struct ksz_device *dev) > { > - return ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ENABLE, PTP_CLK_ENABLE); > + struct ksz_ptp_data *ptp_data = &dev->ptp_data; > + int ret; > + > + ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ENABLE, PTP_CLK_ENABLE); > + if (ret) > + return ret; > + > + spin_lock_bh(&ptp_data->clock_lock); > + ptp_data->clock_time.tv_sec = 0; > + ptp_data->clock_time.tv_nsec = 0; > + spin_unlock_bh(&ptp_data->clock_lock); > + > + return 0; > } > > static const struct ptp_clock_info ksz_ptp_caps = { > @@ -305,6 +357,7 @@ static const struct ptp_clock_info ksz_ptp_caps = { > .settime64 = ksz_ptp_settime, > .adjfine = ksz_ptp_adjfine, > .adjtime = ksz_ptp_adjtime, > + .do_aux_work = ksz_ptp_do_aux_work, > }; > > int ksz_ptp_clock_register(struct dsa_switch *ds) > @@ -315,6 +368,7 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) > > ptp_data = &dev->ptp_data; > mutex_init(&ptp_data->lock); > + spin_lock_init(&ptp_data->clock_lock); > > ptp_data->caps = ksz_ptp_caps; > > diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchip/ksz_ptp.h > index 17f455c3b2c5..81fa2e8b9cf4 100644 > --- a/drivers/net/dsa/microchip/ksz_ptp.h > +++ b/drivers/net/dsa/microchip/ksz_ptp.h > @@ -15,6 +15,9 @@ struct ksz_ptp_data { > struct ptp_clock *clock; > /* Serializes all operations on the PTP hardware clock */ > struct mutex lock; > + /* lock for accessing the clock_time */ > + spinlock_t clock_lock; > + struct timespec64 clock_time; > }; > > int ksz_ptp_clock_register(struct dsa_switch *ds); > -- > 2.36.1 > --0000000000007950be05ee97fc5e Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature 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