Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp904472rwb; Tue, 29 Nov 2022 06:47:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf6bygdQ3m2fVuIZz7yFLWSobu5NvikewjI7OVIuh8AHfCYTRyn9N6/Ri+6eDUeFQsWA5s+6 X-Received: by 2002:a17:90a:6d62:b0:219:4ee5:ccc9 with SMTP id z89-20020a17090a6d6200b002194ee5ccc9mr3926894pjj.63.1669733247852; Tue, 29 Nov 2022 06:47:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669733247; cv=none; d=google.com; s=arc-20160816; b=yhkTGdJv0wNxvJ2Sb083N/e3y2PA/4en4L+ykLdZGcNw2A40u0qjXmrQiduY276aOc Y/3l6zdYXdUJz1M+4UFQJfgpZQS/w2aYYA9KaR6nAXmcmKScIjRu6Ne7zUA9hIPJl7QQ RkP1sGU9gf/+ECQo4iC+5t/7vaY7zEGQaJkUEtkxlUS+7Hg+4bbBbK4f9GcMPur5o6MO YVUO4/09s2uc0YalMexK+clUVu7Q3bEt+KuLCysH2VWvP0IXCrJc4uRLWgZsL73RgUsE YRq3QdQkOhGCXLDSj0Em2N16AFjiBhaAugNXUmC8v3S3hgfwWy/hXuNXYuHHSDRGSbHq 8IQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dmATt0XXLfjGq8KTAB6LQCwLbX+al5xHeC21A61DKj0=; b=QocOgYM9nGnULS1n77uoaqFfo85dVbhqx5T1FE6rtQKFNxYKXSdcwMdUkOUUhOpjw6 O/cqOd/q+5b/+yxCbvcj87XMdYggJjxx9qQJp2VceXZlSXGaRcwPLBwP7ddZ5UydFwnk zE54tH9RaaC65YWnkYcMzPP1NibhwzXCmOKcoQ9OCTd9GiKka5FanX8qP1yoOsRg8FJD DuGSLSTbCx9zLuOi8lfMR4Zt9b/vytHe22IAFJflbUxBodhwRDSvp+CMxJG/cj3QXkow r5ktVLL3uTkL7bxU5gpIzKLMEUMVn4dMpFggrEqJAFB5sQAbEcP3NePliXC3HB9B/ljk sIxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b="hY/6z86R"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i64-20020a638743000000b00473c5330abbsi14765428pge.158.2022.11.29.06.47.16; Tue, 29 Nov 2022 06:47:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b="hY/6z86R"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234679AbiK2ODt (ORCPT + 83 others); Tue, 29 Nov 2022 09:03:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234698AbiK2ODd (ORCPT ); Tue, 29 Nov 2022 09:03:33 -0500 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3F6F1ADBB for ; Tue, 29 Nov 2022 06:03:31 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id jn7so13474541plb.13 for ; Tue, 29 Nov 2022 06:03:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dmATt0XXLfjGq8KTAB6LQCwLbX+al5xHeC21A61DKj0=; b=hY/6z86R84EwODbjkiiGC6QK0QG6Br2dUspKKN2xxrJ8I9quSTGKQCLag9z6OAVc5U EATKmpotnBhW0OItmcD9+yaySF26TlP5OjXCEIpBptR7dWma01PR8ptk7OemJ66JbquV Lb+PnPKW6yYk7VWlNMmwkLfSvnLEfccmBsdRACeew8SunS8mKXTJtt7wCEbM+WTstp9Z Tv880hcMAeQY8/X4jWNG5kueNio+R32G6GlAnPPkSudTu8fBS2MKf4j9utmOa0AYl5vL w7M/n4cIsxQfcp57UyuMiKkFo6dRWmxjFWQ5FM6+Al2cicW24t2uEeZKqUm2/PHm5el3 wYHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dmATt0XXLfjGq8KTAB6LQCwLbX+al5xHeC21A61DKj0=; b=GukcX8wXLrqMMjbvImDgx9927oeuxmsYsbfFAXXL2d8Yh2mj4y02Hw0wHU9VdPH2Z3 VIj/WtOa0WpaIPwrlc3BzSxsdBkBoy/Bemu42UpyQNMEh1JcLjFJm649N7/HH9NzrDgr wKruAAjL3TQcn+qp1cEj1017/JCRzCqEuw1JnsihQBeMVGpNkAS8unZuRwnW5g0P5f2A EsHjYZuOGUjQitNYq5lFR6MrnErMCagRQcxKpQD70wmvLw7EA8NnGLG7GTmnMEG9nANX Patkeu/vY+SRZqXPW8a50TQVRsDnpyt6u/6e2luSdb2fbks2pZfYLgRpdwkP480GBPj6 c3aw== X-Gm-Message-State: ANoB5pnxKKvHywtMIikeAZJOCaMEtYj0LA4FHK1QJmebnkSZrJo5GVQ7 U0iI/ZsVgMzoJO2baJ/KjqRGkg== X-Received: by 2002:a17:902:70c9:b0:176:a0cc:5eff with SMTP id l9-20020a17090270c900b00176a0cc5effmr46522128plt.128.1669730607996; Tue, 29 Nov 2022 06:03:27 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.84.98]) by smtp.gmail.com with ESMTPSA id k30-20020aa79d1e000000b00574f83c5d51sm6013747pfp.198.2022.11.29.06.03.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Nov 2022 06:03:27 -0800 (PST) From: Anup Patel To: Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Daniel Lezcano , Thomas Gleixner Cc: Andrew Jones , Atish Patra , Samuel Holland , Conor Dooley , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/3] RISC-V: time: initialize broadcast hrtimer based clock event device Date: Tue, 29 Nov 2022 19:33:11 +0530 Message-Id: <20221129140313.886192-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221129140313.886192-1-apatel@ventanamicro.com> References: <20221129140313.886192-1-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Conor Dooley Similarly to commit 022eb8ae8b5e ("ARM: 8938/1: kernel: initialize broadcast hrtimer based clock event device"), RISC-V needs to initiate hrtimers before C3STOP can be used. Otherwise, the introduction of C3STOP for the RISC-V arch timer in commit 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend") breaks timer behaviour, for example clock_nanosleep(). A test app that sleeps each cpu for 6, 5, 4, 3 ms respectively, HZ=250 & C3STOP enabled, the sleep times are rounded up to the next jiffy: == CPU: 1 == == CPU: 2 == == CPU: 3 == == CPU: 4 == Mean: 7.974992 Mean: 7.976534 Mean: 7.962591 Mean: 3.952179 Std Dev: 0.154374 Std Dev: 0.156082 Std Dev: 0.171018 Std Dev: 0.076193 Hi: 9.472000 Hi: 10.495000 Hi: 8.864000 Hi: 4.736000 Lo: 6.087000 Lo: 6.380000 Lo: 4.872000 Lo: 3.403000 Samples: 521 Samples: 521 Samples: 521 Samples: 521 Link: https://lore.kernel.org/linux-riscv/YzYTNQRxLr7Q9JR0@spud/ Fixes: 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend") Suggested-by: Samuel Holland Signed-off-by: Conor Dooley --- arch/riscv/kernel/time.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 8217b0f67c6c..1cf21db4fcc7 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -29,6 +30,8 @@ void __init time_init(void) of_clk_init(NULL); timer_probe(); + + tick_setup_hrtimer_broadcast(); } void clocksource_arch_init(struct clocksource *cs) -- 2.34.1