Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp937810rwb; Tue, 29 Nov 2022 07:08:32 -0800 (PST) X-Google-Smtp-Source: AA0mqf5c1Kq0zCynXpF6xdflsKYaVAC0JsxJ+FR/EzmKqZw2tsqw9pC4j8jjod6T22SKotJhDl3M X-Received: by 2002:aa7:dd15:0:b0:46b:c12:29e5 with SMTP id i21-20020aa7dd15000000b0046b0c1229e5mr12222828edv.236.1669734512569; Tue, 29 Nov 2022 07:08:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669734512; cv=none; d=google.com; s=arc-20160816; b=AGJrqv4Vdw9+2FYlhfbmWfZQ16fgc+p6S3izLxaTqTC822GA/L8ssYNCqDtruIok5q 7uxbOm8BwLi3CHGxdYS8j+hQ9PvXY7zCldUUREEAwmv+AMJscl5Ci6zml+otUHe6hOso Z59PMeXH31jQnRMZ0Sr5wKBydUqX/URld0h6i3GRTf8/axqJLolFZomcL7WW4YKHnhiz kzu90rgPxCiIUJoyPClJB2Pvxd0YQgpB3J9iHCxhdWYreBUSEkzaXJOZ4DUsRDAEEc2r zyKjYePnIFrPL2Nn1DfSyYyMOfFvrEX8PCesO2RcC9lDMLHxtkpiEq2sY1Acc2hs6zf/ bEiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RYOO/u4GOvU/wIq/qB7K2ZF3cqFdc+jqZQkEsWjy1BM=; b=03RmgGY0jZ+1nd3oUJiwGdIyJK9PvXNnspyF5pbWUTpqndtetmjFdQkNAvGJuCuMOE MJWaCzVlvfWEiHjXGocgKVfjR8NO9qY2I1QHT9IQviKu9/dWqshvX+fh7GAqahvuJx2c /PFwHqLyepp08SlYWig87qF+QYqjDqAn0uVCPY9ZpP+9dYrVCcyUqWYzegcMC65ISA1t Aen13WKSf8jhDy+r/C6lI5r3BEctKzSfAuYPIbIWhV6KWtVJAxyo0oTyVcq4pVI6/vWG HJK8krrRL+mrnZoIUhe9KsnRwLYAaz0ZLqEGojSYLClzeX/mpYlnGAYbhcfVRSmcp3hB 3CaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=vbQUgtwP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id sa15-20020a1709076d0f00b007be4d8bf6d5si8029046ejc.714.2022.11.29.07.08.07; Tue, 29 Nov 2022 07:08:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=vbQUgtwP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232502AbiK2OvW (ORCPT + 84 others); Tue, 29 Nov 2022 09:51:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230146AbiK2OvR (ORCPT ); Tue, 29 Nov 2022 09:51:17 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB141B4F; Tue, 29 Nov 2022 06:51:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1669733476; x=1701269476; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1i28Wk5Zmf2QpwRYWuzzGRuioCBIh5xXRO+2UEVDDDs=; b=vbQUgtwP6DiVjfoSCMUXYRjMF2BREoUAV0+Wdd+0DuseQbqOPbiddmdA BKIMUkdQqGn5/pfHnvZWziwXfV86xhSNFdlcSo4cH/rB1J+C1lzoZA9Uc 1gwzLcQLPkAabXdEUear+1fG6jc+iU6DytK+dVQiB1k3Cgz9/Mx2clxbi Ev11uS4WJAcT7g7GTpmYGY+9BEOStE0kI9k+jf4/BTarP9PtTOoOnUUnB k118Uar0cJXJoBA6fbZ0OQJCINsNiyi3ei1gAnkt3Ri9AFlE+tH9lMYSP HJ9EILpLcdJa2/SM58Nn656BG5E5kPD0KS3iNyZLNk0VU8F5kHgAYvFMX w==; X-IronPort-AV: E=Sophos;i="5.96,203,1665471600"; d="scan'208";a="125626126" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 29 Nov 2022 07:51:15 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 29 Nov 2022 07:51:13 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 29 Nov 2022 07:51:11 -0700 From: Conor Dooley To: CC: Conor Dooley , , , , , , , , , , , Subject: [RFC 0/2] Putting some basic order on isa extension stuff Date: Tue, 29 Nov 2022 14:47:41 +0000 Message-ID: <20221129144742.2935581-1-conor.dooley@microchip.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org RFC: - I have not even tested this, I just did an allmodconfig - I don't know if I re-ordered something that is sacrosanct - I don't know if I changed all of the instances - I didn't write a proper commit message for "patch" 2/2 With those caveats out of the way - all I did here was try to make things consistent so that it'd be easier to point patch submitters at a "do this order please". I never know which of these can be moved without breaking stuff - but they all seem to be internal use stuff since they're not in uapi? @drew, I didn't touch the KVM ones - are they re-sortable too? My base here is rc7 so if you did a reorder at any point there I'd not see it ;) CC: conor.dooley@microchip.com CC: ajones@ventanamicro.com CC: aou@eecs.berkeley.edu CC: conor@kernel.org CC: devicetree@vger.kernel.org CC: guoren@kernel.org CC: heiko@sntech.de CC: krzysztof.kozlowski+dt@linaro.org CC: linux-kernel@vger.kernel.org CC: linux-riscv@lists.infradead.org CC: palmer@dabbelt.com CC: paul.walmsley@sifive.com CC: robh+dt@kernel.org Conor Dooley (2): RISC-V: clarify ISA string ordering rules in cpu.c RISC-V: resort all extensions in "canonical" order arch/riscv/include/asm/hwcap.h | 6 +++--- arch/riscv/kernel/cpu.c | 26 +++++++++++++++++++------- arch/riscv/kernel/cpufeature.c | 4 ++-- 3 files changed, 24 insertions(+), 12 deletions(-) -- 2.38.1