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Message-ID: <b910e717-86a6-6123-e8a3-9fdf0618fca2@linaro.org>
Date:   Tue, 29 Nov 2022 15:46:48 +0100
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Subject: Re: [PATCH 3/8] dt-bindings: soc: socionext: Add UniPhier peripheral
 block
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To:     Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     Masami Hiramatsu <mhiramat@kernel.org>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20221129103509.9958-1-hayashi.kunihiko@socionext.com>
 <20221129103509.9958-4-hayashi.kunihiko@socionext.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20221129103509.9958-4-hayashi.kunihiko@socionext.com>
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On 29/11/2022 11:35, Kunihiko Hayashi wrote:
> Add devicetree binding schema for the peripheral block implemented on
> Socionext Uniphier SoCs.
> 
> Peripheral block implemented on Socionext UniPhier SoCs is an integrated
> component of the peripherals including UART, I2C/FI2C, and SCSSI.
> 
> Peripheral block has some function logics to control the component.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  .../socionext,uniphier-perictrl.yaml          | 67 +++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml
> new file mode 100644
> index 000000000000..080b6ab3ea1a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Socionext UniPhier peripheral block controller
> +
> +maintainers:
> +  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> +
> +description: |+
> +  Peripheral block implemented on Socionext UniPhier SoCs is an integrated
> +  component of the peripherals including UART, I2C/FI2C, and SCSSI.
> +  Peripheral block controller is a logic to control the component.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - socionext,uniphier-ld4-perictrl
> +          - socionext,uniphier-pro4-perictrl
> +          - socionext,uniphier-pro5-perictrl
> +          - socionext,uniphier-pxs2-perictrl
> +          - socionext,uniphier-ld6b-perictrl
> +          - socionext,uniphier-sld8-perictrl
> +          - socionext,uniphier-ld11-perictrl
> +          - socionext,uniphier-ld20-perictrl
> +          - socionext,uniphier-pxs3-perictrl
> +          - socionext,uniphier-nx1-perictrl
> +          - socionext,uniphier-perictrl
> +      - const: simple-mfd
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +patternProperties:
> +  "^clock-controller(@[0-9a-f]+)?$":
> +    $ref: /schemas/clock/socionext,uniphier-clock.yaml#
> +
> +  "^reset-controller(@[0-9a-f]+)?$":
> +    $ref: /schemas/reset/socionext,uniphier-reset.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    syscon@59820000 {
> +        compatible = "socionext,uniphier-ld20-perictrl",
> +                     "simple-mfd", "syscon";
> +        reg = <0x59820000 0x200>;
> +
> +        clock-controller {

None of your children in examples and in DTS have unit addresses.
However you explicitly mentioned them in the patternProperties. Do you
expect adding unit addresses?

Best regards,
Krzysztof