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([94.12.112.226]) by smtp.gmail.com with ESMTPSA id y18-20020a05600c365200b003c6c5a5a651sm2477572wmq.28.2022.11.29.08.09.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Nov 2022 08:09:34 -0800 (PST) From: Mark Jackson To: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Mark Jackson , Rob Herring , Krzysztof Kozlowski , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] ARM: dts: am335x-nano: Enable RS485 mode for UART3 & 4 Date: Tue, 29 Nov 2022 16:08:15 +0000 Message-Id: <20221129160818.276696-3-mpfj@newflow.co.uk> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221129160818.276696-1-mpfj@newflow.co.uk> References: <20221129160818.276696-1-mpfj@newflow.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org UART3 & 4 are both RS485 ports. So we need to configure and enable this by default. Signed-off-by: Mark Jackson --- arch/arm/boot/dts/am335x-nano.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts index 05cbfe24f778..cecc2afaeff4 100644 --- a/arch/arm/boot/dts/am335x-nano.dts +++ b/arch/arm/boot/dts/am335x-nano.dts @@ -187,12 +187,22 @@ &uart2 { &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; + rts-gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <1 1>; + linux,rs485-enabled-at-boot-time; status = "okay"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&uart4_pins>; + rts-gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <1 1>; + linux,rs485-enabled-at-boot-time; status = "okay"; }; -- 2.34.1